Reconfigurable Polynomial Processing for Faster Cyclic Code Decoding
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Solution Overview
Problem
Existing error-correcting code technologies, such as convolutional and block codes, face complexity and inefficiency in processing cyclic codes, particularly in hardware implementations, which limits their flexibility and speed in error detection and correction processes.
Innovation Solution
The apparatus and method utilize a reconfigurable module with linear feedback shift registers, an encoder controller, and basis transformers to factor generator polynomials into factorial polynomials, enabling efficient encoding and decoding processes, including syndrome calculation and error location determination, with the option for multi-mode operation and parallel processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error-correcting code implementations are used, then error detection and correction functionality is provided, but hardware complexity and processing time increase
Solution Approach 1:
The patent divides the cyclic code processing into distinct modular components: encoding module with linear feedback shift registers, syndrome calculation module, key equation solver, and error correction module. Each module handles specific polynomial operations independently, reducing overall hardware complexity while maintaining error correction capability.
Solution Approach 2:
The linear feedback shift registers are designed to perform multiple functions: encoding cyclic codes, calculating syndromes, solving key equations, and correcting errors. This multi-functionality reduces the need for separate dedicated hardware for each operation, thereby reducing overall device complexity.
2Reliability
If traditional cyclic code processing methods are used, then error correction is achieved, but processing speed decreases
Solution Approach 1:
The patent pre-factors the generator polynomial into irreducible factors and pre-configures the linear feedback shift registers with these factors. This preliminary preparation enables faster real-time processing during encoding and decoding operations, as the factorization computation is performed once during system initialization rather than during each data processing operation.
Solution Approach 2:
The patent replaces traditional sequential mechanical processing with parallel computational operations using linear feedback shift registers and basis transformers. This substitution enables simultaneous polynomial evaluations and syndrome calculations, significantly improving processing speed while maintaining correction accuracy.
3Adaptability or versatility
If flexible error correction modes are implemented, then adaptability to different applications improves, but device complexity increases
Solution Approach 1:
The patent implements a reconfigurable controller that can dynamically switch between different encoding and decoding modes based on application requirements. The linear feedback shift registers can be reconfigured to handle different polynomial factors, enabling adaptive operation without requiring completely different hardware architectures for each mode.
Solution Approach 2:
The patent introduces a reconfigurable controller as an intermediary layer between the input data and the processing modules. This controller manages the complexity of mode switching and configuration, allowing flexible adaptation to different applications while shielding the underlying hardware from excessive complexity.
Data Source
AI summary
An apparatus of processing polynomials includes at least one reconfigurable module and an encoder controller. The reconfigurable module includes a plurality of linear feedback shift registers. The encoder controller can control the reconfigurable module to factor a generator polynomial into a factorial polynomial. In the reconfigurable module, the linear feedback shift registers can register a plurality of factors of the factorial polynomial respectively.