Reconfigurable Processor Mini-Core Architecture for Dynamic Task Processing
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Solution Overview
Problem
Existing reconfigurable architectures face challenges in efficiently handling changes in tasks due to fixed hardware configurations, leading to slower processing speeds when changes occur, and fail to optimize both hardware and software advantages effectively in digital signal processing.
Innovation Solution
A reconfigurable processor design featuring mini-cores with multiple function units of varying computing powers, connected through internal and external networks, allowing for dynamic reconfiguration and optimized task processing by distributing computing power among function units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a task is processed only in a hardware manner, then processing speed is improved, but adaptability to task changes deteriorates due to fixed configuration
Solution Approach 1:
The processor is divided into multiple mini-cores, each containing multiple function units with different computing powers. This segmentation allows the system to process tasks in parallel while maintaining flexibility in configuring which mini-cores are active based on task requirements, thus achieving both high speed and adaptability.
Solution Approach 2:
The processor enables dynamic reconfiguration of mini-cores and function units at runtime. The computing power of each mini-core is defined by the combination of partial computing powers of its function units, which can be dynamically adjusted to match task requirements, resolving the contradiction between fixed hardware speed and adaptability.
2Productivity
If function units have uniform computing power, then device complexity is reduced, but productivity is limited due to inability to optimize for different task requirements
Solution Approach 1:
Each function unit within a mini-core is assigned a specific partial computing power based on its operation elements. This local differentiation of computing power allows the system to optimize task processing efficiency by matching specific function units to specific task requirements, while the overall device complexity is managed through the modular mini-core structure.
3Productivity
If all function units are activated, then productivity is improved, but resource consumption increases
Solution Approach 1:
The processor activates only the necessary mini-cores and function units required for the current task rather than all available resources. By defining the full computing power of each mini-core through the combination of its function units' partial computing powers, the system can selectively engage appropriate resources, improving productivity while minimizing resource consumption.
Data Source
AI summary
A reconfigurable processor includes a plurality of mini-cores and an external network to which the mini-cores are connected. Each of the mini-cores includes a first function unit including a first group of operation elements, a second function unit including a second group of operation elements that is different from the first group of operation elements, and an internal network to which the first function unit and the second function unit are connected.