Reconfigurable Processor Virtual Functions for Direct NIC Data Access
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Solution Overview
Problem
Existing reconfigurable processors, particularly CGRAs, face inefficiencies in data transfer between reconfigurable processor memory and external storage, requiring multiple operations through host processor and memory, leading to high latency and resource utilization.
Innovation Solution
A data processing system enabling direct data access between reconfigurable processors and external storage, bypassing the host processor and memory, utilizing a network interface controller (NIC) to translate virtual addresses into physical addresses for direct data movement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If data transfer goes through host processor and memory, then system compatibility is maintained, but latency increases and bandwidth decreases
Solution Approach 1:
The patent extracts the data transfer function from the host processor by introducing a dedicated NIC with direct access to external storage. The NIC handles data transfer operations independently, removing the bottleneck of host processor involvement and enabling parallel data access without compromising system compatibility.
Solution Approach 2:
The NIC serves as an intermediary component between the reconfigurable processor and external storage. It translates virtual addresses to physical addresses and manages direct data access, simplifying the data transfer path while maintaining system compatibility through the virtualization layer.
2Productivity
If direct data access is implemented, then bandwidth increases and latency decreases, but device complexity increases
Solution Approach 1:
The NIC acts as an intermediary that handles address translation between virtual and physical address spaces. This mediator function is isolated from the reconfigurable processor, allowing direct data access and high bandwidth operations without increasing the complexity of the reconfigurable processor itself.
Solution Approach 2:
The NIC performs multiple functions including virtual-to-physical address translation, data buffer management, and direct data access control. By consolidating these functions in a single component, the system achieves high bandwidth and low latency without proportionally increasing overall device complexity.
3Ease of operation
If host processor resources are utilized for data transfer, then system simplicity is maintained, but resource utilization efficiency decreases
Solution Approach 1:
The data transfer operations are extracted from the host processor and assigned to the NIC. This extraction allows the host processor to focus on computation while the NIC handles data movement, improving resource utilization efficiency without significantly complicating system operation through virtualization abstraction.
Solution Approach 2:
The NIC provides self-service data transfer capabilities by autonomously managing address translation and data access without continuous host processor intervention. This self-service approach improves resource utilization efficiency while maintaining ease of operation through transparent virtualization.
Data Source
AI summary
A data processing system is presented that includes multiple local buses, a host processor, a network interface controller (NIC) for connecting to external storage via a network, one or more reconfigurable processors, and a bus switch. The bus switch couples the multiple local busses, thereby operatively coupling the one or more reconfigurable processors, the host processor, and the NIC. The one or more reconfigurable processors are configured to implement a virtual function that uses a virtual address for a memory access operation.