Reconfigurable Processor Configuration Memory With Sequential Mapping

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Solution Overview

Problem

Reconfigurable processors face inefficiencies in processing tasks with changed work contents due to fixed hardware functions, and software processing is slower, necessitating an optimization of configuration memory usage.

Innovation Solution

A method and apparatus that analyze parallelism in program code loops, schedule function units, and generate configuration data for efficient mapping in configuration memory, using regular encoding and determining optimal memory mapping methods based on processor architecture and memory details.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If configuration memory size is increased to store all possible function unit configurations, then processing capability is improved, but device complexity and cost increase

Engineering Contradiction:

Improveprocessing capabilityVSAvoiddevice complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The configuration memory is divided into multiple banks, and the configuration data is segmented into multiple parts that can be stored across these banks. This segmentation allows the system to manage large configuration data without requiring a single large memory block, thereby reducing complexity while maintaining adaptability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a time dimension by using multiple configuration memory banks that can be accessed in different cycles. Configuration data for different function unit groups is stored in different banks and activated at different times, effectively adding a temporal dimension to the memory architecture to reduce spatial requirements.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If configuration memory size is increased to store all possible function unit configurations, then adaptability is improved, but area occupied increases

Engineering Contradiction:

ImproveadaptabilityVSAvoidarea occupied

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The system uses periodic action by cycling through different configuration memory banks in different clock cycles. Function units are reconfigured periodically by loading configuration data from different banks at different times, which allows the same physical memory resources to serve multiple configuration needs over time, reducing the total area required.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The system discards configuration data from one bank when switching to another bank in a different cycle. Configuration memory banks are reused across different time cycles, with data from previous cycles being discarded and replaced by new configuration data, thereby recovering memory resources and reducing total area requirements.

Inventive Principle:

Principle #34Discarding and recovering

3Productivity

If all function units are activated in each cycle to maximize processing throughput, then productivity is improved, but power consumption increases

Engineering Contradiction:

Improveprocessing throughputVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

Instead of activating all function units in every cycle, the system uses partial action by activating only the necessary subset of function units required for the current computational task. The configuration memory system enables selective activation by loading only the configuration data needed for the current cycle, reducing power consumption while maintaining productivity.

Inventive Principle:

Principle #16Partial or excessive action

4Ease of operation

If configuration data is stored in a non-sequential manner to accommodate irregular access patterns, then ease of operation is improved, but manufacturing precision requirements increase

Engineering Contradiction:

Improveease of operationVSAvoidmapping precision

Core Design Contradiction:

Ease of operationVSManufacturing precision

Solution Approach 1:

The system performs preliminary action by pre-organizing configuration data in a sequential manner in the configuration memory during the compilation phase. The compiler generates configuration data that is sequentially stored in memory banks, and the control logic is pre-designed to access this sequential data in the required order, eliminating the need for complex random access mechanisms while maintaining ease of operation.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS9734058B2Optimizing configuration memory by sequentially mapping the generated configuration data by determining regular encoding is possible and functional units are the same in adjacent cycles

Publication Date: 2017.08.15 SAMSUNG ELECTRONICS CO LTD

AI summary

A method and apparatus for optimizing a configuration memory of a reconfigurable processor is provided. The method of optimizing the configuration memory of the reconfigurable processor includes analyzing parallelism of a loop of a program code based on an architecture of the reconfigurable processor and information regarding the configuration memory, scheduling groups of function units (FUs) to be activated in each cycle of the loop based on the analyzed parallelism, generating configuration data of each cycle, and determining a memory mapping to store the generated configuration data in the configuration memory.