Reconfigurable Processor Asynchronous Timing Control
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Solution Overview
Problem
Reconfigurable processors face limitations in achieving optimal performance due to synchronous timing constraints, which hinder flexibility and energy efficiency, and are vulnerable to physical attacks.
Innovation Solution
A reconfigurable processor with a control unit that generates and delivers timing control information to a reconfigurable cell array, allowing asynchronous operations among reconfigurable cells, enhancing flexibility and operation efficiency by optimizing the timing control method.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If synchronous timing is used in reconfigurable processor, then the processor can be implemented with pipeline technology, but the flexibility is reduced and energy efficiency deteriorates
Solution Approach 1:
The patent implements dynamic timing control by allowing different reconfigurable cells to operate at different clock cycles based on their operation completion status. The timing control unit dynamically adjusts the operation timing of each cell, enabling asynchronous operation within the array. This dynamic approach allows cells to operate independently without being constrained by a uniform synchronous clock, thereby improving flexibility while maintaining processing speed through pipeline technology.
Solution Approach 2:
The patent changes the timing parameter from a fixed synchronous clock signal to a variable timing control signal. Each reconfigurable cell receives timing control information that specifies its operation timing, allowing the timing parameter to be adjusted based on operation requirements. This parameter change enables cells to operate at optimal timing for their specific functions, improving both flexibility and energy efficiency while maintaining high processing speed.
2Productivity
If synchronous timing is used in reconfigurable processor, then pipeline technology can be implemented, but energy efficiency deteriorates
Solution Approach 1:
The patent implements dynamic timing control by allowing different reconfigurable cells to operate at different clock cycles based on their operation completion status. The timing control unit dynamically adjusts the operation timing of each cell, enabling asynchronous operation within the array. This dynamic approach allows cells to operate independently without being constrained by a uniform synchronous clock, thereby improving flexibility while maintaining processing speed through pipeline technology.
Solution Approach 2:
The patent changes the timing parameter from a fixed synchronous clock signal to a variable timing control signal. Each reconfigurable cell receives timing control information that specifies its operation timing, allowing the timing parameter to be adjusted based on operation requirements. This parameter change enables cells to operate at optimal timing for their specific functions, improving both flexibility and energy efficiency while maintaining high processing speed.
3Productivity
If synchronous timing is used in reconfigurable processor, then pipeline technology can be implemented, but the processor becomes vulnerable to physical attacks
Solution Approach 1:
The patent implements dynamic timing control by allowing different reconfigurable cells to operate at different clock cycles based on their operation completion status. The timing control unit dynamically adjusts the operation timing of each cell, enabling asynchronous operation within the array. This dynamic approach allows cells to operate independently without being constrained by a uniform synchronous clock, thereby improving flexibility while maintaining processing speed through pipeline technology.
Solution Approach 2:
The patent changes the timing parameter from a fixed synchronous clock signal to a variable timing control signal. Each reconfigurable cell receives timing control information that specifies its operation timing, allowing the timing parameter to be adjusted based on operation requirements. This parameter change enables cells to operate at optimal timing for their specific functions, improving both flexibility and energy efficiency while maintaining high processing speed.
Data Source
AI summary
The present disclosure provides a reconfigurable processor and a timing control method thereof. The reconfigurable processor comprises a reconfigurable cell array (RCA) including a plurality of reconfigurable cells (RCs) and a control unit; the control unit is configured to generate and send a timing control information to the RCA; and the RCA is configured to execute an operation task according to the timing control information, wherein the RC in the RCA starts to execute an operation when receiving the timing control information, and delivers the timing control information to a next level of RC within the RCA according to a preset order after the operation is completed; and when the RCA completes the operation task corresponding to the timing control information, the RCA destroys the timing control information, wherein the operation task includes operations executed by each level of the RCs receiving the timing control information. According to embodiments of the present disclosure, the operation efficiency of the RCA is improved, thereby optimizing the performance of the processor.