Reconfigurable Data Processor Topology Editing via Graphical Interface
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Solution Overview
Problem
The configuration and optimization of reconfigurable processors, particularly coarse-grain reconfigurable architectures, are hindered by complex and time-consuming procedures for evaluating and modifying the topology of components, which increases design and development time due to the need for frequent updates of configuration files.
Innovation Solution
A system and method for editing the configuration of a reconfigurable data processor using a graphical user interface (GUI) that allows users to visually rearrange the mapping of functions and links among processing elements, enabling on-the-fly changes and optimizations by interpreting user gestures to update the configuration file and recompute links, thereby simplifying the process of optimizing the processor topology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional procedures for evaluating and modifying topology are used, then configuration accuracy is improved, but design and development time increases significantly
Solution Approach 1:
The patent creates a visual copy or representation of the processor topology through graphical user interface elements that mirror the actual hardware arrangement. This visual copy allows designers to evaluate and modify topology configurations interactively without repeatedly executing complex traditional evaluation procedures, thereby maintaining configuration accuracy while dramatically reducing design and development time.
2Productivity
If frequent updates of configuration files are performed to optimize topology, then processor performance is improved, but reconfiguration time and effort increase
Solution Approach 1:
The patent enables preliminary visualization and evaluation of topology configurations through the graphical interface before finalizing configuration file updates. Designers can preview the impact of topology changes, evaluate performance implications, and make informed decisions about which reconfigurations are necessary. This preliminary action reduces the frequency of unnecessary configuration file updates and minimizes reconfiguration time and effort while still achieving optimal processor performance.
Data Source
AI summary
A system and method for editing a configuration of a graph executable on a set of configurable assets of a reconfigurable data processor is disclosed. The configurable assets can include processing elements having locations on an integrated circuit and links among the processing elements. The system includes logic to read at least portions of a configuration file in memory. The configuration file can include a topology that maps functions of the graph to the plurality of processing elements and links. The system includes logic to display a graphical interface including graphical objects representing functions mapped to corresponding processing elements and links in a selected portion of the topology. The system includes logic to detect user input identifying a graphical object representing a function mapped to a corresponding processing element or link. The system includes logic to change the topology including mapping of corresponding function.