Re-configurable Test Processor Architecture for Automated Equipment
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Solution Overview
Problem
Existing automated test equipment for semiconductors and printed circuit boards faces increased test times due to the need for complex protocols and data processing, which reduces manufacturing throughput.
Innovation Solution
A re-configurable architecture for automated test equipment featuring re-configurable test processors that communicate through an inter-processor communications controller, allowing for real-time processing and configuration of stimulus and response data, enabling faster and more complex testing without workstation intervention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data is transferred to workstation for calculation and processing, then complex test algorithms can be executed, but test time increases and manufacturing throughput decreases
Solution Approach 1:
The patent combines the workstation's processing capabilities with the test board's functionality by implementing a processor on the test board itself. This allows the test board to independently execute complex test algorithms that previously required workstation intervention, thereby reducing test time while maintaining algorithm complexity.
Solution Approach 2:
The patent segments the testing system by separating the processing function from the workstation and placing it directly on the test board. This segmentation enables local processing of test data, reducing the need for continuous data transfer to the workstation and thereby decreasing test time.
2Adaptability or versatility
If data is transferred to workstation for calculation and processing, then complex test algorithms can be executed, but manufacturing throughput decreases
Solution Approach 1:
The patent merges the processing capabilities into the test board, enabling it to independently execute complex test algorithms. This eliminates the bottleneck of workstation-dependent processing, thereby improving manufacturing throughput while maintaining the ability to execute complex test algorithms.
Solution Approach 2:
The patent implements preliminary action by pre-configuring the test board with necessary processing capabilities and algorithms. This allows the test board to independently handle complex test algorithms without requiring real-time workstation intervention, thereby improving manufacturing throughput.
3Speed
If re-configurable test processors are used with inter-processor communication, then real-time processing capability is improved, but device complexity increases
Solution Approach 1:
The patent implements universal, re-configurable test processors that can perform multiple functions through software configuration rather than hardware changes. This multi-functionality enables real-time processing capabilities while managing device complexity through software-based reconfiguration instead of hardware complexity.
Data Source
AI summary
An adaptive test system includes one or more reconfigurable test boards, with each test board including at least one re-configurable test processor. The re-configurable test processors can transmit communicate with one another using an inter-processor communications controller associated with each re-configurable test processor. The communications include configuration information, control information, communication protocols, stimulus data, and responses. Configuration information and stimulus data can also be read from a memory. Configuration information is used to configure one or more re-configurable test processors. Once configured, the re-configurable test processor or processors process the data in order to generate one or more test signals. The one or more test signals are then used to test a DUT.