Reconfigurable Transceiver Digital Intermediate Frequency Rate Adaptation

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Solution Overview

Problem

Existing transceivers maintain a high digital intermediate frequency processing rate regardless of the input signal's standard, bandwidth, or frequency bands, leading to increased delay and resource waste, especially in narrowband or low-frequency scenarios.

Innovation Solution

A reconfigurable transmitter and receiver system that adjusts its digital intermediate frequency processing rate and system clock based on input signal frequency band information, using a system adaptive control circuit to generate configuration signals for preprocessing, digital intermediate frequency processing, and analog conversion, allowing for flexible configuration to minimize processing rates and resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the transceiver maintains a high digital intermediate frequency processing rate to support ultra-wideband and multiple bands, then the processing capability and adaptability are improved, but the power consumption and hardware resource waste increase in narrowband scenarios

Engineering Contradiction:
Improvesupport for ultra-wideband, multiple bands, and multiple standardsVSAvoidpower consumption of the RRU
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic reconfiguration of the digital intermediate frequency processing rate based on the actual bandwidth and frequency band requirements. The system can switch between different processing rates (e.g., from a high rate supporting ultra-wideband to a lower rate for narrowband), making the power consumption adaptive to the current operating conditions rather than constantly maintaining the maximum rate.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the digital intermediate frequency processing rate parameter according to the input signal characteristics. By detecting the bandwidth and frequency band requirements, the system adjusts the processing rate parameter to match the actual needs, reducing power consumption when full capability is not required while maintaining the ability to support ultra-wideband and multiple bands when needed.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the transceiver maintains a high digital intermediate frequency processing rate to ensure processing performance across all scenarios, then the processing capability is improved, but the system delay increases in narrowband or low-frequency scenarios

Engineering Contradiction:
Improveprocessing performanceVSAvoidsystem delay of the RRU
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system dynamically adjusts the digital intermediate frequency processing rate based on the actual signal requirements. In narrowband or low-frequency scenarios, the processing rate is reduced to minimize delay, while in ultra-wideband or high-frequency scenarios, the rate is increased to maintain processing performance. This dynamic adjustment resolves the contradiction between reliability and time loss.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The processing rate parameter is changed according to the bandwidth and frequency band of the input signal. By lowering the processing rate parameter in scenarios where full performance is not needed, the system reduces delay while maintaining adequate processing capability when required.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If the transceiver is configured according to the maximum digital intermediate frequency processing rate required by the system, then the adaptability to different bandwidths and frequency bands is improved, but the hardware resource waste occurs in narrowband scenarios

Engineering Contradiction:
Improvesupport for change in bandwidth, quantity of frequency bands, and standardVSAvoidhardware resource waste
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

The hardware resources are dynamically allocated based on the actual processing requirements. The system can scale the digital intermediate frequency processing rate and associated hardware resource usage up or down depending on the bandwidth and frequency band configuration, avoiding permanent allocation of maximum resources that would be wasted in narrowband scenarios while maintaining the capability to handle wideband signals when needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system design allows the same hardware to serve multiple functions by reconfiguring the processing rate. The hardware resources can be universally used for both ultra-wideband processing and narrowband processing by adjusting the operating parameters, eliminating the need for dedicated hardware for each scenario and reducing overall resource waste.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10560132B2Reconfigurable transmitter and receiver, and methods for reconfiguring
Publication Date: 2020.02.11 HUAWEI TECH CO LTD
  • US10560132B2 patent drawing
  • US10560132B2 patent drawing
  • US10560132B2 patent drawing

AI summary

The present application discloses a reconfigurable transmitter and receiver, and methods for reconfiguring the same. A system adaptive control circuit generates a control signal according to frequency band information of an input signal; a system clock circuit generates a system clock; a preprocessing circuit preprocesses a received baseband signal according to the system clock and the control signal, to generate a frequency band signal; a digital intermediate frequency processing circuit processes the frequency band signal according to the system clock and the control signal, to generate a digital intermediate frequency signal; a digital-to-analog conversion circuit processes the digital intermediate frequency signal according to the system clock and the control signal, to generate an analog signal; and an analog transmitting circuit transmits the analog signal.