Reconfigurable Voltage Buffers for Wideband ADC Linearity
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Solution Overview
Problem
Existing voltage buffer designs for analog-to-digital converters (ADCs) face challenges in achieving high linearity and low power consumption across varying frequency ranges, with optimal designs for one frequency range often performing poorly in others, such as from IF sampling at 200-300MHz to RF sampling at 1-2GHz.
Innovation Solution
The development of reconfigurable voltage buffers that incorporate source followers and emitter followers with cascode current sources and bootstrap devices, allowing for strategic placement of switches to optimize performance and power consumption across different frequency ranges, including the use of active cascode devices for low frequencies and bypass capacitance for high frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage buffer designs are optimized for one frequency range (e.g., IF sampling at 200-300MHz), then linearity and performance are improved for that specific range, but performance deteriorates in other frequency ranges (e.g., RF sampling at 1-2GHz)
Solution Approach 1:
The voltage buffer employs reconfigurable circuits with switches that can dynamically change the circuit topology based on the operating frequency range. This allows the buffer to adapt its structure to optimize performance for different frequency bands, transitioning between configurations optimized for IF sampling (200-300MHz) and RF sampling (1-2GHz) ranges.
Solution Approach 2:
The invention changes circuit parameters such as enabling/disabling specific current sources, adjusting bootstrap capacitor connections, and reconfiguring transistor arrangements based on the detected frequency range. These parameter changes allow the same hardware to achieve optimal linearity characteristics across both IF and RF frequency ranges.
2Adaptability or versatility
If reconfigurable circuits with switches are added to optimize performance across frequency ranges, then adaptability is improved, but device complexity increases
Solution Approach 1:
The voltage buffer design uses universal building blocks such as cascode current sources, bootstrap devices, and switch networks that can serve multiple functions across different frequency ranges. The same reconfigurable topology provides both IF-optimized and RF-optimized performance, reducing the need for completely separate circuit designs for each frequency range.
Data Source
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AI summary
In this disclosure, new structures for high-performance voltage buffers (source followers and emitter followers) are described. The structures achieve high performance (linearity) and reduce power consumption. In addition, they are reconfigurable to optimize the performance and power consumption depending on the input frequency range.