Reconstituted Electronic Device Vertical Via Integration
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Solution Overview
Problem
Existing methods for producing reconstituted electronic devices with high component density and compactness face challenges such as bare silicon surfaces, contamination, cutting difficulties with varying material hardnesses, and inability to mount components of different sizes efficiently.
Innovation Solution
A method involving the integration of components with vertical metal tracks and vias, where components are assembled with their connection means on the surface of a substrate, allowing for direct connection and rerouting without the need for insulating layers, and enabling the stacking of components with different sizes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional chip mounting methods are used with connections routed to edges, then assembly is straightforward, but component density is suboptimal
Solution Approach 1:
The patent transitions from conventional edge-routed connections to vertical vias that penetrate through the substrate thickness direction. This dimensional change allows connections to be made in the vertical dimension rather than routing along the horizontal edge, enabling higher component density while simplifying the interconnection architecture through direct vertical pathways.
2Ease of manufacture
If silicon surfaces are left exposed after cutting, then manufacturing is simpler, but the surface must be passivated adding process steps
Solution Approach 1:
The patent combines the passivation function with the substrate material itself by using the substrate as both the structural base and the passivation barrier. The substrate is designed to inherently protect exposed silicon surfaces, eliminating the need for separate passivation layers and reducing overall process complexity while maintaining manufacturing simplicity.
3Quantity of substance
If cutting is performed on stacks containing soft materials like polyimide, then integration is achieved, but burrs and contamination occur
Solution Approach 1:
The patent performs preliminary processing of hard materials before stacking with soft materials. By completing cutting and precision work on rigid substrates first, then adding softer materials like polyimide in subsequent layers, the process avoids contaminating silicon surfaces with burrs from cutting soft materials, while still achieving high integration density through multi-layer stacking.
4Adaptability or versatility
If components of different dimensions are to be assembled, then versatility is improved, but conventional techniques do not allow efficient assembly
Solution Approach 1:
The patent creates a universal substrate platform with standardized via patterns and mounting structures that can accommodate components of various sizes and types. The consistent via architecture and modular substrate design allow different sized components to be efficiently assembled on the same platform, achieving both versatility and manufacturing efficiency through standardized interfaces.
Data Source
Figure 1A~1C
Figure 1D~2A
Figure 2B~3A
AI summary
The invention relates to a reconstituted electronic device (2) comprising: a first face (2') and a second face (2''); a plurality of individual chips (4, 6) placed perpendicular to said faces, each individual chip having, on one of its surfaces, at least one component, tracks and connection means that are flush with one or other of the faces of the reconstituted electronic device; and an encapsulant (28) for encapsulating the individual chips.