Semiconductor Reconstituted Wafer Step-Height Reduction
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Solution Overview
Problem
Current semiconductor redistribution layer processing techniques are costly and time-consuming, particularly due to the need for temporary carriers and additional processing steps, which hinder efficient connection of microcircuits and reduce throughput.
Innovation Solution
A method involving overmolding, chemical-mechanical planarization, and spin coating to form a reconstituted wafer with reduced step-heights, enabling finer pitch redistribution layers without the use of temporary carriers, and allowing for increased I/O capabilities and robust die-to-die interconnects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If temporary carriers are used to bond the reconstituted wafer, then rigidity during processing is improved, but processing cost and time increase
Solution Approach 1:
The patent removes the temporary carrier from the processing system entirely. The reconstituted wafer is processed without bonding to any carrier substrate, eliminating the bonding and debonding steps that consume time and resources. This is achieved by processing the wafer in its free state, which requires specialized equipment capable of handling the thin, flexible reconstituted wafer without carrier support.
Solution Approach 2:
The reconstituted wafer is prepared with sufficient structural integrity through the overmolding process itself, which creates a self-supporting structure. The molding compound encapsulates the dies and provides the necessary mechanical support during subsequent processing steps, eliminating the need for preliminary bonding to temporary carriers.
2Strength
If temporary carriers are used to bond the reconstituted wafer, then rigidity during processing is improved, but device complexity increases
Solution Approach 1:
The temporary carrier and its associated bonding/debonding operations are extracted from the processing sequence. This removal simplifies the overall device structure and processing flow by eliminating unnecessary components and steps that do not contribute to the final product functionality.
Solution Approach 2:
The mechanical support function previously provided by temporary carriers is merged into the molding compound structure itself. The overmolded reconstituted wafer becomes a self-supporting unit that integrates structural integrity with the electronic components, eliminating the need for separate carrier substrates.
3Manufacturing precision
If chemical-mechanical planarization is used to reduce step-height, then manufacturing precision is improved, but processing time increases
Solution Approach 1:
The molding compound is applied in a preliminary action that anticipates the need for planarization. By controlling the overmolding process to create a pre-planarized surface, or by applying a planarization layer during the molding process itself, the subsequent chemical-mechanical planarization step is reduced in duration or intensity, thereby reducing processing time while maintaining precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces processing costs and time, enhances throughput, and enables finer pitch redistribution layers with improved I/O capabilities and die-to-die interconnects, facilitating more efficient semiconductor packaging.
Implementation Method 1
pouring a molding compound over the chips to again form a new wafer or a 'reconstituted' wafer. The molding compound hardens
Implementation Method 2
chemical-mechanical planarizing the first polymer layer to reduce step-height distance in the proximity of a transition point of the at least one die and an adjacent surface
Implementation Method 3
spin coating a first polymer layer on the first side of the reconstituted wafer
Data Source
AI summary
A fan-out process using chemical mechanical planarization (CMP) reduces the step-height between a semiconductor die and the surrounding overmolding of a reconstituted wafer. The reconstituted wafer is formed by overmolding a back side of at least one die that is placed with an active side facing down. The reconstituted wafer is then oriented to expose the die and the active side. A polymer layer is then formed over the reconstituted wafer. A CMP process then removes a portion of the polymer layer until a certain thickness above the die surface is obtained, reducing the step-height between the polymer layer on top of the die surface and the polymer layer on the adjacent mold compound surface. The CMP process can also be performed after a subsequent redistribution layer is formed on the reconstituted wafer.