Reconverging Control Flow Graph Generation

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Solution Overview

Problem

Current compiler technologies face inefficiencies in transforming control flow graphs to accommodate both thread-level and wave-level control flow, leading to increased compile and execution times due to the addition of unnecessary flow blocks, which complicates the compiler output and register allocation.

Innovation Solution

The transformation of a control flow graph into a reconverging graph structure, where every non-uniform terminator has exactly two successors, one of which post-dominates the other, allowing for efficient rejoining of divergent threads and reducing the number of unnecessary flow blocks, is achieved by determining a sequential order for basic blocks and traversing the graph using an open tree data structure to manage execution masks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If control flow graph is transformed to accommodate both thread-level and wave-level control flow, then control flow compatibility is improved, but the number of flow blocks increases and device complexity worsens

Engineering Contradiction:
Improvecontrol flow compatibilityVSAvoidnumber of flow blocks
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges thread-level control flow and wave-level control flow into a unified reconverging control flow graph representation. By combining multiple control flow paths into a single graph structure with reconverging points, the system achieves compatibility with both thread-level and wave-level execution models without requiring separate flow blocks for each model, thus reducing overall device complexity while maintaining adaptability.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If unnecessary flow blocks are added to transform control flow graph, then control flow coverage is improved, but compile time increases and productivity worsens

Engineering Contradiction:
Improvecontrol flow coverageVSAvoidcompile time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts and eliminates unnecessary flow blocks from the control flow graph transformation process. By identifying and removing redundant flow blocks that do not contribute to essential control flow coverage, the system maintains complete control flow coverage while significantly reducing the number of blocks that need to be processed during compilation, thereby improving productivity and reducing compile time.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If unnecessary flow blocks are added to transform control flow graph, then control flow coverage is improved, but execution time increases and productivity worsens

Engineering Contradiction:
Improvecontrol flow coverageVSAvoidexecution time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent removes unnecessary flow blocks that would otherwise increase execution time. By extracting only the essential flow blocks required for proper control flow coverage and eliminating redundant ones, the system achieves complete control flow coverage while minimizing the number of blocks executed, thereby reducing execution time and improving overall productivity.

Inventive Principle:
Principle #2Taking out (Extraction)

4Loss of information

If flow blocks are added to transform control flow graph, then control flow representation is improved, but register allocation complexity increases and device complexity worsens

Engineering Contradiction:
Improvecontrol flow representationVSAvoidregister allocation complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent merges control flow representations into a unified reconverging graph structure that preserves all necessary control flow information while reducing the total number of flow blocks. This consolidation maintains complete control flow representation accuracy but simplifies register allocation by reducing the number of blocks that require register management, thereby reducing device complexity and register allocation overhead.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10802806B1Generating vectorized control flow using reconverging control flow graphs
Publication Date: 2020.10.13 ADVANCED MICRO DEVICES INC
  • US10802806B1 patent drawing
  • US10802806B1 patent drawing
  • US10802806B1 patent drawing

AI summary

A reconverging control flow graph is generated by receiving an input control flow graph including a plurality of basic code blocks, determining an order of the basic code blocks, and traversing the input control flow graph. The input control flow graph is traversed by, for each basic code block B of the plurality of basic code blocks, according to the determined order of the basic code blocks, visiting the basic code block B prior to visiting a subsequent block C of the plurality of basic code blocks, and based on determining that the basic code block B has a prior block A and that the prior block A has an open edge AC to the subsequent block C, in the reconverging control flow graph, creating an edge AF between the prior block A and a flow block F1, and creating an edge FC between the flow block F1 and the subsequent block C.