Heater Layout for Recording Element Substrate Thermal Management
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Solution Overview
Problem
The operation of logic circuits in recording element substrates is affected by heat generated from sub-heaters, leading to decreased response speed and potential errors due to the proximity of heat sources to metal-oxide semiconductor (MOS) transistors.
Innovation Solution
A recording element substrate design where a heater is positioned to surround the recording element array, with a capacitive or resistive element placed above or below the drive circuit to minimize the impact of heat on the circuit components, using a layout where the capacitive or resistive element is less affected by heat than the MOS transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the sub-heater is arranged close to the MOS transistor to heat the substrate, then the heating efficiency is improved, but the operation characteristics of the MOS transistor are affected by heat
Solution Approach 1:
The patent applies dimensional separation by arranging the sub-heater and MOS transistor in different spatial layers (above and below the substrate respectively) rather than placing them adjacent in the same plane. This vertical separation in the third dimension allows the sub-heater to effectively heat the substrate while maintaining sufficient distance from the MOS transistor to prevent heat-induced operational degradation.
2Temperature
If the sub-heater is positioned near the drive circuit to improve heating, then the temperature control is improved, but the logic circuit operation speed decreases due to heat
Solution Approach 1:
The patent positions the sub-heater above the substrate while placing the drive circuit below it, utilizing vertical spatial separation. This dimensional arrangement enables effective thermal control of the substrate while protecting the heat-sensitive logic circuits from thermal interference, thereby maintaining circuit response speed.
Solution Approach 2:
The patent applies local quality by providing targeted heating to specific regions of the substrate through the sub-heater while allowing different regions to have different thermal characteristics. The drive circuit region is thermally isolated from the heating zone, creating localized temperature control that protects sensitive circuits while maintaining heating efficiency.
3Productivity
If the heater array is arranged close to the ink supply port for efficient heating, then the ink ejection performance is improved, but the heat affects the nearby circuit components
Solution Approach 1:
The patent utilizes vertical spatial separation by positioning the heater array above the substrate and the drive circuit below it. This dimensional arrangement allows the heater array to efficiently heat the ink supply region for optimal ejection performance while the drive circuit remains thermally protected in the opposite direction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the influence of heat on the MOS transistor, maintaining circuit performance and preventing errors by isolating the heat source from critical circuit components, thus ensuring consistent operation across varying temperatures.
Implementation Method 1
A heater array 302A including a plurality of heaters is arranged along an ink supply port 301
Implementation Method 2
a capacitive element or a resistive element included in the drive circuit
Data Source
AI summary
A recording element substrate includes a recording element array including a plurality of recording elements, a drive circuit configured to drive the recording elements, and a heater located to surround the recording element array as viewed in a direction perpendicular to a surface of the recording element substrate and located above or below a capacitive element or a resistive element included in the drive circuit as viewed on a cross section of the recording element substrate.