Inkjet Recording Head Wiring Noise Suppression

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Solution Overview

Problem

Full-wiring type inkjet recording heads face noise-induced malfunctions due to capacitive coupling between logic signal wiring and power supply wiring, leading to poor printing quality, as the large number of recording elements driven simultaneously increases noise interference.

Innovation Solution

The recording head features a wiring layer with a specific pattern where logic power source and ground lines are disposed along logic signal lines, reducing capacitive coupling by separating high-frequency logic signal wiring from power supply wiring, and using a two-layered electric wiring member with optimized terminal arrangements to minimize noise generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a large number of recording element substrates are arranged in zigzag to create a full wiring type recording head with large print width, then printing speed increases through single passing without scanning, but noise is more likely to be induced due to longer and closer logic signal wiring causing capacitive coupling

Engineering Contradiction:
Improveprinting speedVSAvoidnoise induction
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The logic signal wiring is segmented into multiple groups (first group, second group, third group) that are spatially separated and routed through different regions of the electric wiring member. This segmentation reduces the length of parallel wiring segments and minimizes capacitive coupling between adjacent signal lines, thereby reducing noise induction while maintaining the full wiring type architecture for high-speed printing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes multi-layer wiring structure (upper layer, lower layer, intermediate layer) to route logic signal lines. By transitioning wiring routes between different layers and using vertical connections (via holes), the patent reduces parallel wiring length in any single plane and provides additional routing dimensions to avoid noise-prone configurations while maintaining signal integrity for high-speed operation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If logic signal wiring is located close to power supply wiring where large current flows, then device complexity is reduced, but induced noise affects the logic signals causing malfunction

Engineering Contradiction:
Improvewiring arrangementVSAvoidlogic signal stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent extracts logic signal wiring from proximity to power supply wiring by creating separate wiring regions. Logic signal lines are routed through dedicated signal wiring regions that are spatially separated from power supply wiring regions, effectively removing the noise source interaction while maintaining a compact overall device structure without significant increase in complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces intermediate structures such as ground shielding lines and insulating layers between logic signal wiring and power supply wiring. These intermediary elements act as barriers that prevent electromagnetic coupling and noise induction, ensuring logic signal stability while allowing close proximity wiring arrangements

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If spaces between high frequency logic signal lines are increased to reduce noise influence, then noise-induced malfunction is reduced, but the electric wiring member and recording head size are enlarged

Engineering Contradiction:
Improvelogic circuit operationVSAvoidrecording head size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent utilizes vertical layering to separate logic signal lines that would otherwise require large horizontal spacing. By routing signals through multiple layers (upper, intermediate, lower) and using via holes for vertical connections, the patent achieves noise reduction equivalent to large spacing while maintaining compact planar dimensions, thus preventing recording head size enlargement

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent combines multiple wiring functions into integrated wiring patterns where logic signal lines, ground lines, and power lines are systematically arranged in specific layer combinations. This merging of wiring functions with optimized spatial arrangement allows reduced spacing between signal lines while maintaining signal integrity through built-in shielding and reference plane proximity

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses noise-induced malfunctions, allowing for high-speed printing with improved image quality by reducing capacitive coupling and preventing unwanted ink discharge, thus enhancing the reliability of the recording head.

Implementation Method 1

The heaters then generate discharge energy (thermal energy), which is given to a recording liquid to cause phase change thereof

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Implementation Method 2

At the time of phase change, the recording liquid bubbles (boils), so that the pressure of generated bubbles is used to discharge droplets

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentUS9186897B2Recording head
Publication Date: 2015.11.17 CANON KK
  • US9186897B2 patent drawing
  • US9186897B2 patent drawing
  • US9186897B2 patent drawing

AI summary

A recording head includes: a recording element substrate having a recording element and a logic circuit cofigured to control driving of the recording element; and an electric wiring member cofigured to provide a wiring layer that has a first group of a plurality of terminals, a second group of a plurality of terminals, and a plurality of signal lines configured to connect the first group of terminals to the second group of terminals; wherein the plurality of signal lines includes a plurality of logic signal lines including a logic power source line, a logic ground line, and at least first and second logic signal lines, and wherein, on the wiring layer, a line pattern connected to one of the logic power source line and the logic ground line is disposed along the first and second logic signal lines.