Almost Rectangular Interleaver for Low-Error-Floor Turbo Coding
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Solution Overview
Problem
Conventional turbo-code interleavers face challenges in minimizing the error floor in word error rate graphs due to inefficient permutation of error patterns, leading to high implementation complexity and resource requirements, especially when supporting various word sizes and block lengths.
Innovation Solution
The use of almost rectangular interleavers, which allow for flexible permutation of information bits across rows and columns with gaps, enabling efficient scrambling and de-scrambling without the need for dummy bits or invalid addresses, and allowing for simple calculation regulations to reduce memory and processing demands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional turbo-code interleavers are used to permute information bits, then error patterns can be scattered to reduce burst errors, but the implementation complexity and resource requirements increase significantly when supporting various word sizes and block lengths
Solution Approach 1:
The patent applies parameter changes by using a family of interleavers where the permutation parameters (such as the increment value in the linear congruential generator) are adjusted based on the information word length. This allows the same interleaver structure to be used for different block sizes by simply changing numerical parameters rather than redesigning the entire interleaver, thereby reducing implementation complexity while maintaining error correction capability.
Solution Approach 2:
The patent implements universality by designing a single interleaver structure that can handle multiple word sizes and block lengths. The interleaver uses a universal permutation formula with adjustable parameters that can be configured for different information word lengths, eliminating the need for separate interleavers for each block size and reducing overall system complexity.
2Adaptability or versatility
If dummy bits or invalid addresses are used to handle non-rectangular data arrangements, then flexible permutation across rows and columns can be achieved, but memory and processing resources are wasted
Solution Approach 1:
The patent extracts and eliminates the need for dummy bits by using a permutation scheme that directly maps information bits to their scrambled positions without requiring padding. The linear congruential permutation formula naturally handles variable-length input words, extracting only the necessary computational operations and removing the wasteful dummy bit mechanism entirely.
Solution Approach 2:
The interleaver performs self-service by using the information word length itself as a parameter to determine the permutation behavior. The system automatically adapts its permutation pattern based on the actual data size without requiring external padding or invalid address generation, making the resource usage efficient and self-regulating.
3Reliability
If complex permutation schemes are used to minimize error floor, then interleaving quality improves, but processing time and computational resources increase
Solution Approach 1:
The patent replaces complex mechanical-like permutation operations with a simple mathematical formula based on linear congruential generation. Instead of using multi-stage sorting networks or complex lookup tables, the invention uses a compact arithmetic expression that can be evaluated quickly, substituting computational mechanics with efficient mathematical operations that maintain interleaving quality while reducing processing time.
Data Source
AI summary
Interleaver for scrambling an information word, the information word having a multitude of digits, for obtaining a permuted information word. The interleaver includes a first interleaver stage for a row-by-row arranging of the digits of the information word in a plurality of first rows and first columns, and a second interleaver stage for scrambling the digits of one of the first rows by interchanging at least two digits of the one first row in order to obtain a first scrambled row, and for replacing the one of the first rows by the first scrambled row. The first interleaver stage is configured for reading the first row, which is replaced based on the first scrambled row, in a column-by-column manner in order to obtain the permuted information word.