Carrier-less Rectangular Semiconductor Package Design
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Solution Overview
Problem
Current semiconductor packaging techniques face challenges in increasing I/O connections on limited space and require carriers, which restrict the flexibility and cost-effectiveness of fan-out wafer level packaging, especially in back-end chip level packaging.
Innovation Solution
A rectangular semiconductor package and manufacturing method that eliminates the need for a carrier by using a conductive routing layer, where a first die is mounted on the layer and electrically connected with metal wires, and a molding compound encases the die, allowing for additional conductive bumps and a second die to be connected, enabling more I/O points and flexible packaging without a carrier.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional carrier-based fan-out packaging is used, then structural support is provided, but packaging cost increases and flexibility is restricted
Solution Approach 1:
The patent extracts and removes the carrier from the packaging structure, transitioning from carrier-based to carrier-less fan-out packaging. The conductive routing layer directly supports the die and conductive balls without requiring a separate carrier substrate, thereby reducing material costs and increasing packaging flexibility while maintaining structural integrity
Solution Approach 2:
The patent merges the carrier functions into the conductive routing layer itself, which simultaneously provides electrical routing, mechanical support, and mounting surface for the die and conductive balls. This integration eliminates the need for a separate carrier and reduces overall package complexity
2Adaptability or versatility
If more I/O connections are added to IC chips, then functionality increases, but layout space becomes insufficient
Solution Approach 1:
The patent utilizes the vertical dimension by extending multiple conductive routing layers above and below the die mounting surface. This three-dimensional routing architecture allows numerous I/O connections to be achieved without increasing the planar footprint, effectively adding I/O capacity in the vertical dimension rather than consuming additional layout space
3Ease of manufacture
If fan-out packaging is implemented without a carrier, then cost is reduced and flexibility is improved, but structural support must be provided by alternative means
Solution Approach 1:
The conductive routing layer is designed to perform multiple functions simultaneously: providing electrical signal routing, offering mechanical support for the die and conductive balls, and serving as the mounting substrate. This multi-functional design eliminates the need for a separate carrier while maintaining adequate structural support
Data Source
AI summary
A rectangular semiconductor package and a method manufacturing the same described in the present disclosure features no carrier installed on a die cut from a wafer. In an embodiment, a first die on a top surface of a conductive routing layer is electrically connected to the conductive routing layer through a plurality of first metal wires, a plurality of conductive balls is installed on a bottom surface of the conductive routing layer, and a molding compound is used to encase the first die on the conductive routing layer. In another embodiment, a second die is added in the above rectangular semiconductor package and encased in the molding compound, as is the first die. Alternatively, the molding compound is processed such that the second die encapsulated in a package is stacked on the molding compound and electrically connected to the conductive routing layer.