Rectangular Via Layout for Circuit Density and Short Prevention
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Solution Overview
Problem
As integrated circuit dimensions decrease, vias become smaller, leading to reliability and performance issues due to current crowding, self-heating, and optical proximity effects causing bird's beak formations and shorting of neighboring vias, which are difficult to mitigate without violating design rules.
Innovation Solution
A method for forming photo masks with non-square patterns and rectangular vias, allowing for increased spacing between vias by determining minimum spacing, selecting patterns to expand or shrink, and checking against design rules to form revised rectangular patterns, thereby reducing optical proximity effects and preventing via shorting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If via dimensions are decreased to increase circuit density, then circuit density is improved, but reliability deteriorates due to current crowding and self-heating effects
Solution Approach 1:
The patent applies local quality by making vias non-uniform in shape (oval or rectangular with different length and width) rather than perfectly circular. This local variation in geometry allows optimization of current distribution in specific directions, reducing current crowding effects while maintaining small overall via dimensions for high density.
Solution Approach 2:
The patent changes the geometric parameters of vias by introducing aspect ratios (length/width) greater than 1.0, transforming them from uniform circles to elongated shapes. This parameter change enables better thermal and current management while maintaining compact footprint for high circuit density.
2Productivity
If via dimensions are decreased to increase circuit density, then circuit density is improved, but performance deteriorates due to high contact resistance and RC delay
Solution Approach 1:
The non-uniform via geometry creates local quality variations that optimize current flow paths. The elongated shape provides larger cross-sectional area in critical directions, reducing contact resistance and improving electrical performance while maintaining small overall dimensions for high density.
Solution Approach 2:
By changing via geometric parameters (introducing length and width with ratio >1.0), the patent achieves lower contact resistance and RC delay despite reduced via size, thereby improving performance while maintaining high circuit density.
3Reliability
If redundant vias are added to reduce open circuit probability, then reliability is improved, but via spacing decreases causing bird's beak effects and shorting
Solution Approach 1:
The patent introduces asymmetry in via geometry (oval or rectangular with length/width ratio >1.0) which allows redundant vias to be placed closer together without creating symmetric bird's beak patterns. The asymmetric shape reduces optical proximity effects during photolithography exposure, preventing shorting while maintaining reliability through redundancy.
Solution Approach 2:
By changing via shape parameters from circular to elongated forms, the patent modifies the optical interaction during exposure, reducing bird's beak effects and allowing smaller spacing between redundant vias without causing shorting, thus maintaining reliability while minimizing spacing.
4Productivity
If via spacing is decreased to increase circuit density, then circuit density is improved, but manufacturing precision deteriorates due to bird's beak formation and via shorting
Solution Approach 1:
The asymmetric via geometry (length/width ratio >1.0) disrupts the formation of symmetric bird's beak patterns during photolithography. This asymmetry prevents the overlapping of development patterns that cause shorting, thereby improving manufacturing precision while allowing smaller via spacing for high density.
Solution Approach 2:
The patent changes via geometric parameters to elongated shapes, which modifies the exposure and development behavior during manufacturing. This parameter change reduces optical proximity effects and bird's beak formation, improving via formation precision even at reduced spacing for high circuit density.
Data Source
AI summary
A method of forming photo masks having rectangular patterns and a method for forming a semiconductor structure using the photo masks is provided. The method for forming the photo masks includes determining a minimum spacing and identifying vertical conductive feature patterns having a spacing less than the minimum spacing value. The method further includes determining a first direction to expand and a second direction to shrink, and checking against design rules to see if the design rules are violated for each of the vertical conductive feature patterns identified. If designed rules are not violated, the identified vertical conductive feature pattern is replaced with a revised vertical conductive feature pattern having a rectangular shape. The photo masks are then formed. The semiconductor structure can be formed using the photo masks.