Rectification Circuit Calibration for Internal Voltage Offset Control
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Solution Overview
Problem
Voltage level offsets between rectification circuits in semiconductor apparatuses can lead to suboptimal operation, degrading overall system performance, as some circuits fail to maintain internal voltage levels, affecting memory cores, peripheral circuits, and input/output operations.
Innovation Solution
A voltage generation circuit with selectively activated rectification circuits, a detection circuit for comparing pre-detection and reference signals, and a storage circuit to store trimmed control signals for offset calibration, allowing for external system calibration to maintain consistent internal voltage levels across all rectification circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple rectification circuits are distributed in the semiconductor apparatus, then the internal voltage can be provided to various loads (memory core, peripheral circuit, input/output circuit), but voltage level offsets between the rectification circuits cause some circuits to fail operating typically, degrading system performance
Solution Approach 1:
The patent divides the voltage generation system into multiple independent rectification circuits, each capable of generating internal voltage for different loads. This segmentation allows versatile voltage distribution while enabling independent calibration of each circuit to maintain reliability despite manufacturing variations.
Solution Approach 2:
The patent introduces trimmable reference voltages for each rectification circuit, allowing the voltage parameters to be adjusted post-manufacturing. This parameter change capability compensates for offset variations between circuits, ensuring reliable operation while maintaining the ability to serve multiple loads.
2Ease of manufacture
If rectification circuits are manufactured with standard processes, then production cost and complexity are controlled, but voltage offsets between circuits occur due to manufacturing variations, causing some circuits to not maintain target voltage levels
Solution Approach 1:
The patent incorporates trimmable reference voltage circuits within each rectification circuit during manufacturing. These preliminary calibration mechanisms are built into the circuit design, allowing post-manufacturing adjustment to compensate for variations without requiring complex manufacturing processes.
Solution Approach 2:
Each rectification circuit includes its own trimmable reference voltage that can be independently calibrated. This self-service capability allows each circuit to compensate for its own manufacturing variations without requiring external intervention or complex matching processes.
3Device complexity
If voltage offsets are not compensated, then the circuit design remains simple without calibration mechanisms, but system performance degrades because some rectification circuits cannot maintain internal voltage at target levels
Solution Approach 1:
The patent adds trimmable reference voltage parameters to each rectification circuit, enabling performance optimization without fundamentally changing the circuit architecture. This parameter adjustment capability maintains design simplicity while significantly improving system productivity by ensuring all circuits operate at target voltage levels.
Solution Approach 2:
The patent implements a calibration mechanism where detection circuits monitor the internal voltage output of each rectification circuit and provide feedback for trimming the reference voltage. This feedback loop ensures high system performance while keeping the overall design relatively simple through automated calibration processes.
Data Source
AI summary
A voltage generation circuit includes a plurality of rectification circuits configured to be selectively activated depending on a plurality of first control signals, and to generate an internal voltage according to respective reference voltages capable of being independently trimmed depending on a plurality of second control signals; a detection circuit configured to generate a detection signal by comparing a pre-detection signal, generated in each of the plurality of rectification circuits, and a reference signal; and a storage circuit configured to store a pre-select signal provided from an external system, and to output a stored signal to each of the plurality of rectification circuits as the plurality of second control signals.