Rectifier Circuit with Booster Gate Drive for Low Conduction Loss
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Solution Overview
Problem
Existing rectifier circuits for low-voltage applications, such as RFID tags and noncontact IC cards, suffer from conduction loss due to threshold voltage requirements, which cannot be effectively reduced without increasing manufacturing costs or complexity.
Innovation Solution
A rectifier circuit design incorporating an n-channel MOS transistor with a booster circuit and control signal generation unit, allowing the switch element to connect and disconnect at the peak of the input voltage, thereby reducing the threshold voltage and minimizing conduction loss without additional manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a MOS transistor with low threshold voltage is used to reduce conduction loss, then conduction loss is reduced, but manufacturing cost increases due to additional processes
Solution Approach 1:
The patent changes the operating parameters of a standard MOS transistor by applying a dynamically boosted gate voltage that exceeds the threshold voltage only during the critical rectification phase. This allows the use of conventional transistors (avoiding additional manufacturing processes) while achieving low-threshold-voltage performance when needed, thereby reducing conduction loss without increasing manufacturing cost
2Productivity
If the threshold voltage is reduced to improve rectification efficiency, then rectification efficiency is improved, but device complexity increases
Solution Approach 1:
The patent employs periodic boosting of the gate voltage synchronized with the AC input voltage cycles. The booster circuit activates only during peak voltage portions when rectification is needed, applying enhanced gate drive periodically rather than continuously. This achieves high rectification efficiency during critical phases while keeping the overall device complexity manageable through time-based control
3Device complexity
If a standard MOS transistor is used without voltage boosting, then device simplicity is maintained, but conduction loss increases due to threshold voltage requirements
Solution Approach 1:
The patent applies preliminary action by boosting the gate voltage to exceed the threshold voltage before and during the critical rectification phase. The control circuit anticipates the need for low-resistance conduction and pre-charges the gate, ensuring the transistor is fully enhanced exactly when the AC input voltage peaks, thereby minimizing conduction loss while maintaining device simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces conduction loss and enhances the output voltage generation efficiency, providing a higher output voltage both immediately after startup and after stabilization of the oscillation frequency, while maintaining manufacturing cost-effectiveness.
Implementation Method 1
when the voltage (Vgs) between the gate and the source of the transistor is higher than the threshold voltage (Vth) of the transistor, the transistor is turned on and a current flows from the drain to the source
Data Source
AI summary
A rectifier circuit including a switch element, controls connection and disconnection of an AC input voltage using the switch element to generate an output voltage. The switch element includes an n-channel MOS transistor. The rectifier circuit further includes a booster circuit and a control signal generation unit, and establishes connection to the switch element at a peak portion of the input voltage. The booster circuit is configured to generate and apply a gate control signal including a voltage higher than a threshold voltage of the n-channel MOS transistor to a gate of the n-channel MOS transistor. The control signal generation unit is configured to generate and output a control signal for controlling connection and disconnection of the n-channel MOS transistor to the booster circuit.