Rectifier Junction Structure for High Power Density in Small Chips
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Solution Overview
Problem
Conventional rectifier diodes suffer from low power output and require larger chip sizes to generate sufficient power, limiting their efficiency in high power applications.
Innovation Solution
A high power density rectifier apparatus is designed with a substrate silicon layer, a middle silicon layer, an upper silicon layer, and trench termination layers that increase the size of the p-n junction, allowing for higher power density while maintaining a smaller chip size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional rectifier diode structure is used, then device simplicity is maintained, but power density is low
Solution Approach 1:
The rectifier diode is segmented into multiple silicon layers (substrate layer, middle layer, upper layer) with distinct functions. The middle silicon layer is divided into multiple regions (first region, second region, third region) with different doping concentrations, allowing each segment to contribute differently to power density while managing electrical characteristics independently
Solution Approach 2:
Different regions of the middle silicon layer are doped with different concentrations of dopant atoms (first concentration in first region, second concentration in second region, third concentration in third region). This local variation in doping quality optimizes power density in specific areas while maintaining overall device functionality
2Power
If larger chip size is used, then sufficient power output is achieved, but chip area increases
Solution Approach 1:
The patent transitions from a planar junction design to a three-dimensional stacked layer structure. By stacking multiple silicon layers vertically with intermediate contact structures, the effective junction area is increased without proportionally increasing the chip footprint, thereby achieving higher power output in a compact area
Solution Approach 2:
The intermediate contact structure is nested within the layered silicon structure, with the contact extending through the middle silicon layer to connect upper and lower regions. This nested arrangement maximizes the use of vertical space within the chip, increasing power density without expanding the horizontal chip dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves increased power density and efficiency by forming a larger p-n junction through novel geometry, enabling higher power output without the need for larger chip sizes.
Implementation Method 1
The device is manufactured using n-type and p-type semiconductor materials that are joined together via a junction. The p-n junction may be formed between the upper silicon layer and the middle silicon layer.
Data Source
Figure 1a~1c
Figure 2a
Figure 2b
AI summary
A high power density rectifier diode apparatus, structure and associated methods thereof. The apparatus includes a substrate silicon layer, a middle silicon layer coupled to the substrate layer, an upper silicon layer coupled to the middle silicon layer, a cathode terminal coupled to the substrate silicon layer, an anode terminal coupled to the upper silicon layer, and one or more trench termination layers formed in the substrate silicon layer and at least a portion of the middle silicon layer. The trench termination layers are configured to be formed on at least one side of the substrate silicon layer and at least a portion of the middle silicon layer. The substrate silicon layer is at least one of the following: an n-type layer, a p-type layer, and any combination thereof.