Semiconductor Rectifier Supersaturated P-Body Interface
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Solution Overview
Problem
Conventional power semiconductor rectifiers face challenges in achieving a balance between low forward voltage drop and reduced reverse leakage current, especially at elevated temperatures, and in high voltage applications where trench Schottky rectifiers are not well-suited due to area consumption and parasitic N+/P/N bipolar structures affecting dV/dt performance.
Innovation Solution
A semiconductor rectifier device comprising a supersaturated δP++ layer, a P-body region, an N-drift region, and an N+ substrate, with a method of fabrication involving dopant implantation and formation of titanium silicide to create a high-efficiency power semiconductor rectifier that operates as a pin diode or majority carrier device, reducing parasitic structures and improving switching performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If Schottky barrier rectifiers are used for low voltage applications, then high switching speeds and very low forward voltage drops are achieved, but reverse leakage current increases significantly at elevated temperatures
Solution Approach 1:
The rectifier structure is segmented into distinct regions: a P+/N junction region for controlling reverse leakage, Schottky barrier regions for low forward voltage drop, and a P-body region for managing carrier flow. This segmentation allows each region to perform its specific function optimally, resolving the contradiction between low forward voltage and low reverse leakage.
Solution Approach 2:
The invention combines multiple material structures and junction types (P+/N junction, Schottky barrier, P-body) into a composite rectifier device. This composite structure integrates the advantages of different rectifier types while mitigating their individual disadvantages, achieving both low forward voltage drop and reduced reverse leakage current.
2Object-generated harmful factors
If JBS rectifier structure is implemented, then reverse leakage current is reduced by approximately 50%, but device complexity increases due to additional P/N junction grid
Solution Approach 1:
The invention merges the P+/N junction grid function with the Schottky barrier regions into an integrated structure. The P-body region serves dual purposes: it forms the P/N junction for reverse leakage control and provides the base for Schottky barriers. This merging reduces structural complexity while maintaining the leakage reduction benefits.
3Reliability
If trench Schottky structure is used for high voltage applications, then reverse voltage blocking characteristic is improved, but area available for Schottky barrier is reduced by up to 50%
Solution Approach 1:
The invention transitions from a planar trench structure to a vertical P+/N junction structure with Schottky barriers on the surface. This dimensional change allows the rectifier to achieve high voltage blocking through the vertical junction depth while maintaining full chip area availability for Schottky barrier formation, eliminating the area loss inherent in trench structures.
4Ease of operation
If MOS transistor-like two terminal device is used, then forward current flow is improved through N-channel formation, but parasitic N+/P/N bipolar structure reduces dV/dt performance
Solution Approach 1:
The invention extracts and eliminates the parasitic N+/P/N bipolar structure from the device by using a P+/N junction instead of an N+ source. This removal of the harmful parasitic structure preserves the desired forward current flow characteristics while eliminating the detrimental effect on dV/dt performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a favorable balance between forward voltage drop and reverse leakage current, enhances dV/dt performance, and simplifies the fabrication process, reducing chip size and cost by eliminating unnecessary implantation steps and parasitic structures.
Implementation Method 1
implanting the dopant of the first conductivity type into the drift region to create the body region of the first conductivity type
Implementation Method 2
concentrating a portion of the implanted dopant at the interface region between the layer of silicide and body region to create the layer of silicon which has been supersaturated with the dopant of the first conductivity type
Implementation Method 3
forming a layer of higher order silicide, e.g., titanium silicide, on the body region
Data Source
AI summary
A high-efficiency power semiconductor rectifier device (10) comprising a δP++ layer (12), a P-body (14), an N-drift region (16), an N+ substrate (18), an anode (20), and a cathode (22). The method of fabricating the device (10) comprises the steps of depositing the N-drift region (16) on the N+ substrate (18), implanting boron into the N-drift region (16) to create a P-body region (14), forming a layer of titanium silicide (56) on the P-body region (14), and concentrating a portion of the implanted boron at the interface region between the layer of titanium silicide (56) and the P-body region (14) to create the δP++ layer (12) of supersaturated P-doped silicon.