Rectifying Apparatus Dynamic Gate Control for Backflow Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional synchronous rectifying apparatuses face challenges in reducing on-resistance to minimize loss while maintaining rectification efficiency, often resulting in backflow due to parasitic elements in pMOS transistors, which decreases efficiency.
Innovation Solution
The rectifying apparatus employs a configuration with pMOS and nMOS transistors, current and voltage detecting circuits, and controlling circuits to manage the transistors' operation based on load conditions, using parasitic diodes to prevent backflow and minimize voltage drop, thereby improving power loss and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the on-resistance is decreased to reduce loss, then power loss is reduced, but rectification capability deteriorates and backflow occurs
Solution Approach 1:
The patent applies dynamics by making the nMOS transistor gate voltage controllable and variable. The gate voltage is dynamically adjusted based on the operating state (synchronous rectification mode or backflow prevention mode), allowing the transistor to switch between low-resistance and high-resistance states as needed, thus resolving the contradiction between reducing power loss and maintaining rectification capability
Solution Approach 2:
The patent changes the electrical parameter (gate voltage) of the nMOS transistor to control its resistance. By varying the gate voltage between different levels, the transistor's on-resistance is adjusted to match the required operating mode, enabling both low power loss during rectification and backflow prevention when needed
2Reliability
If a pMOS transistor is forced to serve as a diode to prevent backflow, then backflow is prevented, but parasitic current flows and efficiency decreases
Solution Approach 1:
The patent extracts and removes the parasitic element (parasitic diode current) from the system by using an nMOS transistor instead of a pMOS transistor for the synchronous rectification switch. The nMOS transistor does not have the same parasitic diode issue, thus eliminating the source of parasitic current while maintaining backflow prevention capability through controlled gate voltage
Solution Approach 2:
The patent introduces a gate voltage control mechanism as an intermediary to manage the nMOS transistor operation. This intermediary control system enables precise regulation of the transistor's state, allowing it to function as both a low-resistance switch and a backflow barrier without the efficiency penalties associated with parasitic currents
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves full-wave rectification with reduced power loss and prevents backflow, enhancing the overall efficiency of the rectifying apparatus by effectively managing transistor operation and utilizing parasitic diodes when load current is low.
Implementation Method 1
a power receiving coil (L1) connected between a first power receiving terminal (TAC1) and a second power receiving terminal (TAC2) and configured to be electromagnetically coupled with the power transmitting coil (L2) in the power transmitting apparatus (101)
Data Source
AI summary
A rectifying apparatus (power receiving apparatus) 100 is configured to receive electric power output from the power transmitting apparatus 101. The rectifying apparatus 100 is mobile equipment, such as a battery, a smartphone incorporating a battery and a tablet PC, or equipment for a battery charger connected to the equipment. The rectifying apparatus (power receiving apparatus) 100 may be any other equipment that receives electric power output from the associated power transmitting apparatus 101, including a rechargeable electric car, a household appliance and a product for underwater application.