Recursive Filter Circuit for C-RAN Timestamp Jitter Reduction
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Solution Overview
Problem
Cloud radio access networks (C-RAN) face challenges in maintaining high accuracy time synchronization between radio heads due to dynamic jitter caused by clock domain crossings, which affects the performance of 5G and IoT wireless technologies.
Innovation Solution
A circuit employing recursive filter logic, specifically a recursive least-squares (RLS) filter, is used to generate a filtered timestamp by reducing jitter in received timestamps, thereby improving synchronization accuracy across multiple clock domains.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If timestamp synchronization is performed across multiple clock domains, then time synchronization capability is improved, but jitter in timestamps increases
Solution Approach 1:
A recursive filter is introduced as an intermediary component between the timestamp synchronization circuit and the timestamp consumer. The filter processes the synchronized timestamps and removes jitter components, allowing the system to maintain both multi-clock-domain synchronization capability and low jitter output.
Solution Approach 2:
The recursive filter uses feedback from previous filtered timestamp values to continuously refine the current timestamp output. By comparing the current synchronized timestamp with the previous filtered timestamp and adjusting based on the difference, the system reduces jitter while maintaining synchronization accuracy across clock domains.
2Measurement precision
If recursive filtering is applied to reduce timestamp jitter, then timestamp accuracy is improved, but processing complexity increases
Solution Approach 1:
The recursive filter uses a simple linear recurrence relation with a fixed or adaptively adjusted filter coefficient (alpha). By changing the parameter representation from complex filtering algorithms to a simple weighted average of current and previous values, the system achieves effective jitter reduction with minimal processing complexity.
Data Source
AI summary
A circuit and corresponding method generate a filtered timestamp. The circuit comprises recursive filter logic. The circuit generates the filtered timestamp from a received timestamp by filtering the received timestamp via the recursive filter logic. The recursive filter logic reduces jitter in the filtered timestamp relative to jitter of the received timestamp. The jitter represents a deviation of the received timestamp from a target (ideal) timestamp. The circuit outputs the filtered timestamp generated. The filtered timestamp is a more accurate representation of the target timestamp, relative to the received timestamp, due to the jitter reduced.