Ultra-low Drain-Source Resistance Power MOSFET via Red Phosphorus Doping

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Solution Overview

Problem

Conventional semiconductor designs and processing techniques are unable to produce power metal oxide semiconductor field effect transistors (MOSFETs) with drain-to-source resistance (RDS) below approximately 2 milliohms per square centimeter, and they often compromise breakdown voltage when attempting to reduce ON resistance.

Innovation Solution

The use of a red Phosphorus-doped substrate with strategically designed epitaxial layers, including a first epitaxial layer to limit Phosphorus diffusion and a second epitaxial layer doped with Arsenic or Phosphorus, allows for the creation of ultra-low drain-source resistance power MOSFETs with improved breakdown voltage characteristics, compatible with existing semiconductor processing systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional semiconductor designs and processing techniques are used, then manufacturing compatibility is maintained, but drain-source resistance cannot be reduced below approximately 2 milliohms per square centimeter

Engineering Contradiction:
Improvedrain-source resistanceVSAvoidprocessing technique complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent changes the dopant type from conventional Arsenic to red Phosphorus, and modifies doping concentrations and layer thickness parameters to achieve ultra-low drain-source resistance below 2 milliohms per square centimeter while maintaining compatibility with existing semiconductor processing techniques

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention uses a composite structure with multiple epitaxial layers having different doping compositions and concentrations - specifically a first epitaxial layer with red Phosphorus doping and a second epitaxial layer with different doping characteristics - to optimize both resistance and manufacturability

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If doping levels are increased to reduce ON resistance, then drain-source resistance decreases, but breakdown voltage characteristics deteriorate

Engineering Contradiction:
Improvedrain-source resistanceVSAvoidbreakdown voltage
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies different doping strategies to different regions: red Phosphorus doping in the substrate and first epitaxial layer for low resistance, while controlling doping concentrations and layer thicknesses locally to maintain adequate breakdown voltage characteristics in critical regions

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The device is divided into multiple epitaxial layers with distinct doping profiles - a first epitaxial layer and a second epitaxial layer - allowing optimization of drain-source resistance in one layer while preserving breakdown voltage characteristics in another layer

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach achieves drain-source resistance of less than 1.0 milliohms per square centimeter while maintaining high breakdown voltage, overcoming the limitations of conventional methods by optimizing doping levels and layer thicknesses.

Implementation Method 1

a substrate highly doped with red Phosphorus

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

a first epitaxial layer is formed adjacent and contiguous to a substrate highly doped with red Phosphorus

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS9887266B2Ultra-low drain-source resistance power MOSFET
Publication Date: 2018.02.06 VISHAY SILICONIX LLC
  • US9887266B2 patent drawing
  • US9887266B2 patent drawing
  • US9887266B2 patent drawing

AI summary

Ultra-low drain-source resistance power MOSFET. In accordance with an embodiment of the preset invention, a semiconductor device comprises a plurality of trench power MOSFETs. The plurality of trench power MOSFETs is formed in a second epitaxial layer. The second epitaxial layer is formed adjacent and contiguous to a first epitaxial layer. The first epitaxial layer is formed adjacent and contiguous to a substrate highly doped with red Phosphorus. The novel red Phosphorus doped substrate enables a desirable low drain-source resistance.