Redistribution Bonding Interconnect for Low-Profile Chip Stacks
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Solution Overview
Problem
The vertical height of chip stack packages is high and heat dissipation efficiency is low due to bonding pads being disposed on the upper surfaces of semiconductor devices.
Innovation Solution
The semiconductor device incorporates redistribution bonding interconnections with pad connection portions, horizontal and vertical extension portions, and bonding portions on the side surfaces of the chip body, allowing for reduced vertical height and improved heat dissipation through bonding wires connecting to substrate pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding pads are disposed on upper surfaces of semiconductor devices, then electrical connection is achieved, but vertical height increases and heat dissipation efficiency decreases
Solution Approach 1:
The bonding pads are repositioned from the upper surface to the side surface of the chip body, utilizing a different spatial dimension. The redistribution bonding interconnection includes a horizontal extension portion extending to the side surface and a vertical extension portion extending downward, creating a three-dimensional path that reduces the vertical height requirement while maintaining electrical connectivity.
2Reliability
If bonding pads are disposed on upper surfaces of semiconductor devices, then electrical connection is achieved, but heat dissipation efficiency decreases
Solution Approach 1:
By moving the bonding pads to the side surface and creating a vertical extension portion that extends downward, the design exposes more surface area to the surrounding environment for heat dissipation. The three-dimensional configuration allows heat to dissipate from multiple surfaces (side surface and lower end portion) rather than being confined to the upper surface.
3Length of stationary object
If redistribution bonding interconnection with side surface bonding pads is used, then vertical height is reduced and heat dissipation is improved, but manufacturing complexity increases
Solution Approach 1:
The redistribution bonding interconnection is divided into distinct functional portions: a pad connection portion for electrical connection, a horizontal extension portion extending to the side surface, and a vertical extension portion extending downward. This segmentation allows each portion to be optimized and manufactured separately using standard semiconductor fabrication processes, reducing overall manufacturing complexity.
4Length of stationary object
If redistribution bonding interconnection with side surface bonding pads is used, then vertical height is reduced and heat dissipation is improved, but device structure becomes more complex
Solution Approach 1:
The redistribution bonding interconnection utilizes three-dimensional space with horizontal and vertical extension portions, creating a compact structure that reduces vertical height. This spatial optimization allows the bonding pads to be positioned on the side surface while maintaining a compact overall device footprint, effectively trading structural complexity for reduced vertical dimension.
Data Source
AI summary
A semiconductor device includes a chip body; a circuit layer over the chip body; an upper insulating layer over the circuit layer; a chip metal layer over the upper insulating layer, the chip metal layer including a pad portion; a passivation layer over the chip metal layer; a lower redistribution insulating layer over the passivation layer, the pad portion of the chip metal layer left exposed by the passivation layer and the lower redistribution insulating layer; a redistribution bonding interconnection over the lower redistribution insulating layer; and an upper redistribution insulating layer over the lower redistribution insulating layer. The redistribution bonding interconnection includes a pad connection portion electrically connected to the pad portion of the chip metal layer; a horizontal extension portion extending from the pad connection portion to a side surface of the chip body; a vertical extension portion disposed over the side surface of the chip body, the vertical extension portion extending downward from a side end portion of the horizontal extension portion; and a bonding portion disposed over the side surface of the chip body. The bonding portion is positioned at a lower end portion of the vertical extension portion.