Redistribution Interconnects for Plating Uniformity in Semiconductor Devices

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Solution Overview

Problem

Semiconductor devices manufactured using WPP technology face issues with appearance abnormalities and film thickness variations in redistribution interconnects, leading to reduced reliability and production yield due to uneven plating current distribution and density differences across the wafer.

Innovation Solution

Incorporating both real and dummy redistribution interconnect patterns electrically separated within the semiconductor substrate, with dummy patterns formed in regions where real patterns are not, to distribute interconnects uniformly and stabilize plating current, thereby reducing abnormalities and thickness variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redistribution interconnects are formed only in regions where real patterns are required, then device functionality is achieved, but appearance abnormalities and film thickness variations occur due to uneven plating current distribution

Engineering Contradiction:

Improvereliability of semiconductor deviceVSAvoidfilm thickness uniformity of redistribution interconnects

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies homogeneity by forming both real redistribution interconnects and dummy redistribution interconnects across the entire wafer surface. This creates a uniform distribution of interconnect patterns, ensuring even plating current density and consistent film thickness throughout the wafer, thereby eliminating appearance abnormalities while maintaining device functionality through the real interconnects only.

Inventive Principle:

Principle #33Homogeneity

2Ease of manufacture

If plating process is used to form redistribution interconnects, then interconnect formation is achieved, but appearance abnormalities occur due to uneven current density distribution across the wafer

Engineering Contradiction:

Improveease of forming redistribution interconnectsVSAvoidsurface quality of redistribution interconnects

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the spatial distribution parameter of the plating patterns by introducing dummy interconnects alongside real ones. This modifies the current density distribution parameter during plating, ensuring uniform current flow across the wafer surface. The result is improved surface quality of the redistribution interconnects while maintaining the ease of the plating process for interconnect formation.

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If dummy patterns are added to distribute interconnects uniformly, then plating current stability is improved, but device complexity increases

Engineering Contradiction:

Improveuniformity of redistribution interconnect formationVSAvoidcomplexity of interconnect patterns

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the interconnect patterns into two distinct categories: real redistribution interconnects that provide electrical connectivity and dummy redistribution interconnects that serve only to uniform current distribution. This segmentation allows the dummy patterns to be electrically isolated or removed in subsequent steps, achieving uniform plating without permanently increasing device complexity.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the reliability of semiconductor devices by minimizing appearance abnormalities and ensuring consistent film thickness across the wafer, enhancing production yield and stability of redistribution interconnects.

Implementation Method 1

redistribution interconnects are formed over the electrode layer by using the plating process

Methodology Applied

Scientific EffectElectroplating: Electroplating

Data Source

PatentUS8558391B2Semiconductor device and a method of manufacturing the same

Publication Date: 2013.10.15 RENESAS ELECTRONICS CORP

AI summary

A semiconductor device having redistribution interconnects in the WPP technology and improved reliability, wherein the redistribution interconnects have first patterns and second patterns which are electrically separated from each other within the plane of the semiconductor substrate, the first patterns electrically coupled to the multi-layer interconnects and the floating second patterns are coexistent within the plane of the semiconductor substrate, and the occupation ratio of the total of the first patterns and the second patterns within the plane of the semiconductor substrate, that is, the occupation ratio of the redistribution interconnects is 35 to 60%.