Redistribution Layer Inspection Before Chip Bonding
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Solution Overview
Problem
Current package technologies lack a real-time monitoring method to inspect the process of the redistribution layer and the quality of devices, leading to waste due to defects found after chip bonding.
Innovation Solution
An electronic device is designed with a redistribution layer comprising a first and second insulating layer, and a plurality of traces electrically connected through openings in the insulating layers. Passive components are placed on one side, and an electronic component on the other, with traces connecting them for real-time inspection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If chips are bonded on the redistribution layer and then circuit inspection is performed, then defects can be detected, but the chips cannot be reused and manufacturing cost increases
Solution Approach 1:
The patent applies preliminary action by performing circuit inspection on the redistribution layer before bonding chips to it. The inspection is conducted on the bare redistribution layer structure (including traces, vias, and insulating layers) prior to chip attachment. This allows defects to be detected early in the manufacturing process, enabling the redistribution layer to be discarded or reworked before investing in chip bonding, thereby preventing manufacturing waste and cost increases
2Manufacturing precision
If real-time monitoring is implemented during redistribution layer fabrication, then process quality can be inspected, but manufacturing complexity increases
Solution Approach 1:
The patent implements preliminary inspection of the redistribution layer structure before chip bonding, allowing process quality to be verified at an early stage. This preliminary check includes inspecting the traces, vias, and insulating layers for defects such as open circuits, short circuits, or fabrication errors. By performing this inspection beforehand, the need for complex real-time monitoring systems during fabrication is reduced, as the inspection can be done using standard post-fabrication testing methods on the completed redistribution layer
Solution Approach 2:
The patent uses inspection techniques that create an electrical model or representation of the redistribution layer circuit to detect defects. By measuring electrical properties (such as resistance, continuity, or signal transmission) of the traces and vias, the system can infer the quality of the fabrication process without requiring complex physical monitoring equipment during manufacturing. This copying approach simplifies the monitoring system while maintaining effective quality control
Data Source
AI summary
The present disclosure provides an electronic device including a redistribution layer, a plurality of passive components, and an electronic component. The redistribution layer includes a first insulating layer, a second insulating layer, and a plurality of traces electrically connected to each other through a first opening of the first insulating layer and a second opening of the second insulating layer, wherein the first insulating layer has a first side away from the second insulating layer, and the second insulating layer has a second side away from the first insulating layer. The passive components are disposed on the first side. The electronic component is disposed on the second side. The plurality of passive components are electrically connected to the electronic component through the plurality of traces.