Redistribution Layer Conductive Coverage for Semiconductor Yield

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Solution Overview

Problem

Conventional semiconductor manufacturing methods result in material wastage and damage to the redistribution and conductive layers due to the complete coverage of the conductive layer, which complicates the testing of solder ball fixity and reduces the yield rate of the semiconductor structure.

Innovation Solution

A manufacturing method where the conductive layer is only formed on the exposed redistribution layer through specific openings, allowing for reduced material usage and minimizing damage during shear force testing by limiting the conductive layer's coverage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the conductive layer completely covers the redistribution layer, then the electrical connection is ensured, but the material of the conductive layer is wasted

Engineering Contradiction:
Improveelectrical connectionVSAvoidconductive layer material
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The conductive layer is selectively formed only in specific regions where electrical connection is needed, rather than uniformly covering the entire redistribution layer. This localized approach maintains necessary electrical connections while reducing material waste.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The conductive layer coverage is divided into multiple discrete regions corresponding to specific electrical pads, with gaps between them. This segmentation allows material to be applied only where functionally required.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the conductive layer completely covers the redistribution layer, then the electrical connection is ensured, but the corners of the redistribution layer and conductive layer are easily damaged during shear force testing

Engineering Contradiction:
Improveelectrical connectionVSAvoiddamage resistance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The conductive layer is selectively formed only in specific regions where electrical connection is needed, rather than uniformly covering the entire redistribution layer. This localized approach maintains necessary electrical connections while reducing material waste.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The conductive layer coverage is divided into multiple discrete regions corresponding to specific electrical pads, with gaps between them. This segmentation allows material to be applied only where functionally required.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the conductive layer completely covers the redistribution layer, then the electrical connection is ensured, but the yield rate of the entire semiconductor structure is difficult to be improved

Engineering Contradiction:
Improveelectrical connectionVSAvoidyield rate
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The conductive layer is selectively formed only in specific regions where electrical connection is needed, rather than uniformly covering the entire redistribution layer. This localized approach maintains necessary electrical connections while reducing material waste.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The conductive layer coverage is divided into multiple discrete regions corresponding to specific electrical pads, with gaps between them. This segmentation allows material to be applied only where functionally required.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces material costs and enhances the yield rate of the semiconductor structure by preventing damage to the redistribution and conductive layers during testing, thereby improving the overall manufacturing efficiency.

Implementation Method 1

the first conductive layer in step (f) is formed by utilizing a chemical plating process

Methodology Applied
Scientific EffectChemical plating: Electroplating

Implementation Method 2

the isolation layer in step (b) is formed by utilizing a chemical vapor deposition process

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS9214579B2Electrical contact structure with a redistribution layer connected to a stud
Publication Date: 2015.12.15 XINTEC INC
  • US9214579B2 patent drawing
  • US9214579B2 patent drawing
  • US9214579B2 patent drawing

AI summary

A manufacturing method of a semiconductor structure includes the following steps. A wafer structure having a silicon substrate and a protection layer is provided. An electrical pad on the protection layer is exposed through the concave region of the silicon substrate. An isolation layer is formed on the sidewall of the silicon substrate surrounding the concave region and a surface of the silicon substrate facing away from the protection layer. A redistribution layer is formed on the isolation layer and the electrical pad. A passivation layer is formed on the redistribution layer. The passivation layer is patterned to form a first opening therein. A first conductive layer is formed on the redistribution layer exposed through the first opening. A conductive structure is arranged in the first opening, such that the conductive structure is in electrical contact with the first conductive layer.