Redistribution Layer Flatness in Element Packages

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Solution Overview

Problem

Existing element packages face challenges in achieving improved flatness of redistribution layers, which can lead to issues such as reduced signal wiring thickness, disconnection, and compromised electrical connection reliability, especially in the vicinity of the boundary between the element region and the scribe region.

Innovation Solution

The introduction of an insulating portion above the scribe region, with a height not exceeding the outer peripheral edge of the protective film, and the redistribution layer being disposed over both the protective film and the insulating portion, enhances the flatness and reliability of the redistribution layer, eliminating the need for bonding wires and simplifying the connection structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the redistribution layer is disposed directly on the semiconductor element surface without an insulating portion, then the device complexity is reduced, but the flatness of the redistribution layer deteriorates leading to signal wiring reduction or disconnection

Engineering Contradiction:
Improveconnection structure complexityVSAvoidredistribution layer flatness
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

An insulating portion is introduced as an intermediary element between the semiconductor element and the redistribution layer. This insulating portion fills the stepped portion formed by the protective film and semiconductor element surface, providing a flat foundation for the redistribution layer while maintaining structural integrity and eliminating the need for complex bonding wire connections

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the insulating portion height exceeds the protective film outer peripheral edge, then the flatness of the redistribution layer is improved, but the electrical connection reliability deteriorates due to potential disconnection

Engineering Contradiction:
Improveredistribution layer flatnessVSAvoidelectrical connection reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The height of the insulating portion is precisely controlled as a critical parameter, setting it to be equal to or lower than the outer peripheral edge of the protective film. This parameter optimization ensures that the insulating portion fills the stepped portion adequately to provide flatness while maintaining proper electrical connection pathways and preventing disconnection

Inventive Principle:
Principle #35Parameter changes

3Reliability

If bonding wires are used for connections, then the electrical connection reliability is maintained, but the device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidconnection structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bonding wire connection method is extracted and removed from the device structure. Instead of using separate bonding wires, the patent implements a direct integrated connection where the redistribution layer is disposed adjacent to the semiconductor element surface, eliminating the need for bonding wires while maintaining electrical connection reliability through the insulating portion-supported structure

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20230223310A1Element package and semiconductor device
Publication Date: 2023.07.13 DENSO CORP
  • US20230223310A1 patent drawing
  • US20230223310A1 patent drawing
  • US20230223310A1 patent drawing

AI summary

An element package includes a semiconductor element, a redistribution layer, a sealing resin body, and an insulating portion. The semiconductor element includes a semiconductor substrate having an element region and a scribe region, a main electrode and a pad disposed on a surface of the semiconductor substrate, and a protective film disposed above the element region on the surface of the semiconductor substrate. The sealing resin body seals the semiconductor element while exposing the main electrode and the pad. The insulating portion is disposed above the scribe region on the surface of the semiconductor element with a height not to exceed an outer peripheral edge portion of an upper surface of the protective film on the element region. The redistribution layer extends over the protective film and the insulating portion above the scribe region.