Redistribution Layer Protection in Fan-Out Package Cleaning

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Solution Overview

Problem

The conventional fan-out panel level package (FOPLP) technology faces issues with over-etching of the dielectric layer during cleaning and etching processes, leading to damage of the redistribution layer and affecting the package device's characteristics.

Innovation Solution

A protecting layer is formed between the release layer and the redistribution layer to prevent damage during cleaning and etching processes. This protecting layer fully covers the release layer and conductive pads, ensuring effective cleaning and protection of the redistribution layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the conventional FOPLP method is used without a protecting layer, then the cleaning and etching processes can access the conductive pads, but the dielectric layer of the redistribution layer is easily over-etched, damaging the structure

Engineering Contradiction:
Improveredistribution layer structure integrityVSAvoidcleaning and etching process accessibility
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

A protecting layer is introduced as an intermediary between the release layer and the redistribution layer. This protecting layer serves as a temporary barrier that prevents over-etching of the dielectric layer during cleaning and etching processes, while still allowing the conductive pads to be accessed for solder ball bonding. After serving its protective function, the protecting layer is removed, having fulfilled its role as a temporary mediator.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protecting layer is formed in advance, before the cleaning and etching processes are performed. This preliminary action ensures that the dielectric layer is already protected before any harmful etching can occur, preventing structural damage to the redistribution layer before the manufacturing process even begins.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the dielectric layer is over-etched during cleaning process, then the conductive pads become more accessible, but the redistribution layer structure is damaged and package device characteristics are affected

Engineering Contradiction:
Improvepackage device characteristicsVSAvoidover-etching damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The protecting layer acts as a cushioning barrier formed beforehand to absorb and prevent the harmful effects of over-etching. By placing this protective layer in advance, the dielectric layer is shielded from excessive etching that would otherwise damage the redistribution layer structure and compromise package device characteristics.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The protecting layer serves as an intermediary element that mediates between the cleaning/etching processes and the delicate redistribution layer structure. It allows necessary cleaning to occur while preventing harmful over-etching, thus protecting the structural integrity and electrical characteristics of the package device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12230558B2Package device
Publication Date: 2025.02.18 INNOLUX CORP
  • US12230558B2 patent drawing
  • US12230558B2 patent drawing
  • US12230558B2 patent drawing

AI summary

The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.