Redistribution Layer Planarization for Stable Die Attachment
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Solution Overview
Problem
The reliability of electrical connections between conductive terminals and internal components within semiconductor packages is a challenge in wafer level packaging, particularly due to the need for improved planarity and stability during the attachment of semiconductor dies.
Innovation Solution
A method involving the use of a debond layer on a carrier, followed by the formation of a first redistribution layer with varying conductive element densities and the inclusion of auxiliary dielectric portions to create a planarized surface, ensuring stable attachment of semiconductor dies and preventing void formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a redistribution layer with varying conductive element densities is formed, then electrical connection reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies local quality by varying the pattern density of conductive elements in different regions of the redistribution layer. First conductive elements are arranged with a first pattern density in a first region, while second conductive elements are arranged with a second pattern density in a second region. This localized variation optimizes electrical connection reliability in different areas without requiring complete redesign of the entire structure.
Solution Approach 2:
The redistribution layer is segmented into multiple regions with different conductive element densities. The first region contains first conductive elements with a first pattern density, while the second region contains second conductive elements with a second pattern density. This segmentation allows independent optimization of each region for its specific functional requirements.
2Stability of the object's composition
If auxiliary dielectric portions are added to planarize the surface, then attachment stability is improved, but device complexity increases
Solution Approach 1:
The auxiliary dielectric portions are formed in advance during the redistribution layer fabrication process, before the semiconductor die attachment step. This preliminary planarization action ensures that the surface is properly prepared for attachment, improving stability without requiring additional steps after the main structure is formed.
3Reliability
If conductive elements with different pattern densities are used, then electrical performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
Different pattern densities are implemented in different regions based on local electrical performance requirements. The first conductive elements have a first pattern density optimized for the first region's electrical characteristics, while the second conductive elements have a second pattern density optimized for the second region's electrical characteristics.
Data Source
AI summary
A package structure includes a first redistribution layer, a semiconductor die and a second redistribution layer. The first redistribution layer includes a first dielectric layer, first conductive elements, second conductive elements, a top dielectric layer and an auxiliary dielectric portion. The first conductive elements and the second conductive elements are disposed on the first dielectric layer with a first pattern density and a second pattern density respectively. The top dielectric layer is disposed on the first dielectric layer and covering a top surface of the second conductive elements. The auxiliary dielectric portion is disposed in between the first dielectric layer and the top dielectric layer, and covering a top surface of the first conductive elements. The semiconductor die is disposed on the first redistribution layer. The second redistribution layer is disposed on the semiconductor die, and electrically connected to the semiconductor die and the first redistribution layer.