Redistribution Layer Resistance via Segmented Vias

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Solution Overview

Problem

Current semiconductor device redistribution layers face challenges in reducing resistance and ensuring signal and voltage consistency across the semiconductor device, leading to inconsistent performance.

Innovation Solution

The configuration of electrically conductive regions in the redistribution layers, with varying widths and shapes, connected to vias from different lateral directions, reduces resistance and enhances signal and voltage consistency by manipulating the width and rate of change of these regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional redistribution layer configurations are used, then manufacturing is simpler, but resistance is higher and signal consistency deteriorates

Engineering Contradiction:
Improvesignal consistencyVSAvoidredistribution layer configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by varying the width of electrically conductive regions within the redistribution layer. Different regions have different widths optimized for their specific functions: wider regions for low resistance current paths and narrower regions for signal routing. This localized optimization improves signal consistency and reduces resistance without requiring complete redesign of the entire layer structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements dynamics by creating conductive regions with varying widths that adapt to different electrical requirements throughout the redistribution layer. The width variations allow the structure to dynamically optimize electrical performance across different regions, providing lower resistance where needed while maintaining signal integrity in other areas.

Inventive Principle:
Principle #15Dynamics

2Reliability

If uniform width conductive regions are used, then manufacturing is easier, but resistance increases and voltage consistency deteriorates

Engineering Contradiction:
Improvevoltage consistencyVSAvoidconductive region configuration
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by varying the width of electrically conductive regions within the redistribution layer. Different regions have different widths optimized for their specific functions: wider regions for low resistance current paths and narrower regions for signal routing. This localized optimization improves signal consistency and reduces resistance without requiring complete redesign of the entire layer structure.

Inventive Principle:
Principle #3Local quality

3Reliability

If conductive regions are connected from single direction, then structure is simpler, but resistance is higher

Engineering Contradiction:
Improveresistance reductionVSAvoidvia connection configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the via connections into multiple groups that connect to conductive regions from different lateral directions. Instead of a single connection path, the structure segments the electrical path into multiple directional components, creating parallel current paths that reduce overall resistance and improve electrical performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements another dimension by utilizing lateral directions beyond the traditional single-axis connection. Conductive regions are connected from multiple lateral directions, adding a dimensional aspect to the via connection geometry. This multi-directional approach creates more efficient current distribution and reduces resistance without significantly increasing manufacturing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11031335B2Semiconductor devices including redistribution layers
Publication Date: 2021.06.08 MICRON TECHNOLOGY INC
  • US11031335B2 patent drawing
  • US11031335B2 patent drawing
  • US11031335B2 patent drawing

AI summary

Semiconductor devices may include a substrate and a redistribution layer. The redistribution layer may include a dielectric material and electrically conductive material. Vias may extend through the dielectric material. A first region of the electrically conductive material may be connected to a first subset of vias in a row from a first lateral side of the row, the first region occupying more than half of a width of the row on the first lateral side. A second region of the electrically conductive material may be connected to a second subset of vias in the row from a second, opposite lateral side of the row, the second region occupying more than half of the width of the row on the second lateral side.