Redistribution Layer for Semiconductor Die Stacking

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Solution Overview

Problem

Conventional methods for forming stacked electronic packages, such as those using support bonding wires, are inadequate in reducing manufacturing cost and complexity, especially when dealing with fine-pitch semiconductor devices and through-silicon via (TSV) processes.

Innovation Solution

A semiconductor device and manufacturing method that involves bonding a second semiconductor die to a first semiconductor die with a through silicon via (TSV) using a redistribution layer, which extends around the side portions of the second die, eliminating the need for solder and reducing the accuracy required for TSV and bond pad matching, thereby minimizing manufacturing costs and avoiding thermal processes that could damage the wafer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional support bonding wires are used to form stacked electronic packages, then electrical connection between semiconductor die can be achieved, but manufacturing cost and process complexity increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the support bonding wire from the stacking process entirely. Instead, the redistribution layer itself performs the electrical connection function between stacked semiconductor die, eliminating the need for separate support bonding wires and reducing manufacturing complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The redistribution layer serves multiple functions: it redistributes electrical signals within the semiconductor die and simultaneously provides the electrical connection between stacked die. This multi-functionality eliminates the need for separate support bonding wires

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If through silicon via (TSV) process is used with fine pitch, then high speed operation and miniaturization are achieved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvedevice operation speedVSAvoidmanufacturing process complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent combines the TSV formation process with the redistribution layer formation process. The redistribution layer is formed to extend around the side portions of the semiconductor die, integrating the electrical connection function with the signal redistribution function, thereby simplifying manufacturing

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If solder is used to bond semiconductor die, then electrical connection is achieved, but device lifetime decreases and thermal damage risk increases

Engineering Contradiction:
Improveelectrical connectionVSAvoiddevice lifetime
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent replaces solder with a redistribution layer made of copper or other metals that do not require thermal processing. This eliminates the thermal damage associated with soldering and extends device lifetime, though it uses a different material approach

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS9196601B2Semiconductor device
Publication Date: 2015.11.24 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US9196601B2 patent drawing
  • US9196601B2 patent drawing
  • US9196601B2 patent drawing

AI summary

Various aspects of the present disclosure provide a semiconductor device and a method for manufacturing thereof, which can facilitate stacking of semiconductor die while saving manufacturing cost. In an example embodiment, the semiconductor device may comprise a first semiconductor die, a second semiconductor die bonded to a top surface of the first semiconductor die, and a redistribution layer electrically connecting the first semiconductor die to the second semiconductor die, wherein the redistribution layer is formed to extend along surrounding side portions of the second semiconductor die.