Redistribution Layer Patterning With Spacers for Dense Semiconductor Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in achieving higher integration density of semiconductor components due to limitations in fabricating compact design metallic wiring layers with precise alignment and small critical dimensions in redistribution circuit structures.
Innovation Solution
A two-staged exposure and development process using spacers is employed to form trenches and openings with larger dimensions initially, which are then narrowed by spacers, ensuring precise pattern transfer and alignment, allowing for smaller critical dimensions and increased routing intensity in redistribution layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional single-stage exposure and development process is used, then the process is simple and fast, but the alignment precision and manufacturing precision deteriorate due to limitations in forming small critical dimensions
Solution Approach 1:
The exposure and development process is divided into two distinct stages: first forming larger dimension trenches and openings, then using spacers to narrow them to precise small critical dimensions. This segmentation allows each stage to optimize for its specific dimensional requirements, achieving high precision without requiring the entire process to operate at the limit of single-stage capabilities.
Solution Approach 2:
The first exposure and development stage performs preliminary formation of trenches and openings with larger dimensions that are easier to form with good alignment. The spacers are then formed based on these preliminary structures, using them as templates to achieve the final precise dimensions. This preliminary action reduces the alignment burden on the second stage.
2Manufacturing precision
If single-stage exposure process forms small critical dimensions directly, then the routing intensity can be increased, but the alignment tolerance decreases leading to higher defect rates
Solution Approach 1:
The patterning process is segmented into two stages: first creating larger dimension features with relaxed alignment requirements, then using spacers to define the final small critical dimensions. This allows high routing intensity to be achieved through precise spacer formation rather than direct single-stage patterning, maintaining alignment tolerance while enabling dense routing.
Solution Approach 2:
The spacers act as an intermediary structure between the initially formed larger trenches/openings and the final small critical dimension patterns. The spacers mediate the transformation from relaxed-dimension features to precise-dimension features, enabling both good alignment tolerance and high routing intensity to coexist.
3Reliability
If conventional process forms metallic wiring layers with compact design, then the integration density can be improved, but the risk of shorting increases due to reduced spacing between conductors
Solution Approach 1:
The conductor formation process is segmented into: (1) forming trenches with spacers defining precise widths, (2) filling conductors only in spacer-defined regions, (3) removing excess conductor material between spacers. This segmentation ensures conductors are precisely positioned with controlled spacing, preventing shorting while enabling high integration density through optimized routing.
Solution Approach 2:
The spacers serve a dual function: they define the precise dimensions of conductors and simultaneously act as masks to prevent conductor formation in unwanted regions. This self-service function of the spacers ensures automatic shorting prevention without requiring additional complex process steps.
4Manufacturing precision
If two-staged exposure and development process is used, then the manufacturing precision and alignment tolerance are improved, but the fabrication time and process complexity increase
Solution Approach 1:
The patterning is segmented into two exposure and development stages, each optimized for specific dimensional ranges. The first stage handles larger dimensions with relaxed precision requirements, the second stage handles small critical dimensions with high precision. This segmentation reduces the overall process time compared to attempting single-stage high-precision patterning, as each stage operates in its optimal performance range.
Solution Approach 2:
The first exposure and development performs preliminary patterning that simplifies the second stage's task. By pre-forming the trench and opening structures with larger dimensions, the second exposure only needs to form spacers with precise dimensions, reducing its exposure time and complexity. This preliminary action distributes the time burden across two simpler, faster stages.
Data Source
AI summary
A package structure and a manufacturing method thereof are disclosed. The structure includes at least one semiconductor die, a redistribution layer disposed on the at least one semiconductor die, and connectors there-between. The connectors are disposed between the at least one semiconductor die and the redistribution layer, and electrically connect the at least one semiconductor die and the redistribution layer. The redistribution layer includes a dielectric layer with an opening and a metallic pattern layer disposed on the dielectric layer, and the metallic pattern layer includes a metallic via located inside the opening with a dielectric spacer surrounding the metallic via and located between the metallic via and the opening.