Redistribution Layer Package Structure Eliminating TSV Interposers
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Solution Overview
Problem
The complex and costly process of forming an interposer substrate layer with through-silicon-vias (TSVs) in semiconductor device packaging hinders efficient integration density and increases manufacturing difficulties.
Innovation Solution
A package structure and manufacturing method that eliminates the TSV module by using a redistribution layer directly connected to both the substrate and chip, featuring a block layer adjacent to the metal layer, with metal segments formed through a damascene process, and connectors such as solder bumps or balls for interconnection, simplifying the process flow and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If an interposer substrate layer with through vias is used to improve integration density, then the density of semiconductor devices is improved, but the manufacturing process becomes complex and costly
Solution Approach 1:
The patent extracts and eliminates the interposer substrate layer with through vias from the packaging structure. Instead of using a complex TSV-based interposer, the invention directly connects the chip to the substrate using a simplified redistribution layer approach, removing the problematic intermediate structure while maintaining electrical connectivity and integration density.
Solution Approach 2:
The patent merges the functions of the interposer substrate and redistribution layer into a single integrated structure. The redistribution layer is directly formed on the substrate without requiring a separate interposer layer, combining multiple functions into one element and simplifying the overall manufacturing process while achieving the same electrical interconnection goals.
2Productivity
If through vias are formed in the interposer substrate to improve device density, then integration density is improved, but manufacturing cost and difficulty increase
Solution Approach 1:
The patent removes the through via structure from the manufacturing process entirely. By eliminating the interposer substrate layer that requires TSV formation, the invention avoids the complex and costly via drilling, filling, and planarization steps while still achieving high device density through direct chip-to-substrate connections via the redistribution layer.
Solution Approach 2:
The patent replaces the expensive and complex TSV-based interposer structure with a simpler, more cost-effective redistribution layer approach. The simplified structure achieves the same functional outcome (electrical interconnection and signal routing) at lower manufacturing cost and with easier processing, effectively using a less complex solution to replace the expensive complex one.
Data Source
AI summary
A package structure and a method for fabricating thereof are provided. The package structure includes a substrate, a first connector, a redistribution layer, a second connector, and a chip. The first connector is disposed over the substrate. The redistribution layer is directly disposed over the first connector, and is connected to the substrate by the first connector. The redistribution layer includes a block layer, and a metal layer over the block layer. The second connector is directly disposed over the redistribution layer, and the chip is connected to the redistribution layer by the second connector.