Redistribution Line Protection Layers for Oxidation and Adhesion

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Solution Overview

Problem

Existing integrated circuit technologies face challenges in protecting redistribution lines from oxidation and improving adhesion between conductive features and dielectric layers, which can affect the reliability and performance of semiconductor packages.

Innovation Solution

Formation of protection layers on redistribution lines using conductive materials like Ni, Sn, Ag, Cr, Ti, or Pt, which are plated after creating gaps in the photoresist to ensure coverage and adhesion, reducing oxidation and enhancing the connection with dielectric layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If redistribution lines are exposed without protection layers, then manufacturing process is simpler, but oxidation occurs reducing reliability

Engineering Contradiction:
Improveoxidation resistanceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A protection layer is introduced as an intermediary component between the redistribution line and the environment. This protection layer acts as a barrier that prevents oxidation of the conductive material while maintaining the electrical functionality of the redistribution line. The protection layer is specifically positioned to cover the top surface and sidewalls of the redistribution line, providing targeted protection where oxidation would occur.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If protection layers are added to redistribution lines, then adhesion improves, but manufacturing complexity increases

Engineering Contradiction:
ImproveadhesionVSAvoidprocess complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The protection layer is formed on the redistribution line before subsequent dielectric layers are deposited. This preliminary formation of the protection layer ensures that the adhesion-promoting surface is established early in the manufacturing process, allowing subsequent layers to bond effectively to it. The protection layer serves as a prepared interface that facilitates strong adhesion between the redistribution line and overlying structures.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If photoresist gaps are created before plating, then protection layer coverage is improved, but process steps increase

Engineering Contradiction:
Improvecoverage precisionVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Gaps are created in the photoresist layer before the plating process to expose the redistribution line surface. This preliminary gap creation allows the plating solution to access and deposit protective material on the top surface and sidewalls of the redistribution line. By preparing the photoresist pattern in advance, the plating process can achieve precise coverage of the intended areas without requiring additional masking steps later.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The protection layers effectively reduce oxidation of redistribution lines and improve adhesion, enhancing the reliability and performance of semiconductor packages by maintaining electrical connectivity and structural integrity.

Implementation Method 1

plating a protection layer on the conductive feature

Methodology Applied
Scientific EffectPlating: Electroplating

Implementation Method 2

reducing oxidation of redistribution lines

Methodology Applied
Scientific EffectOxidation resistance: Oxidation

Data Source

PatentUS12438048B2Redistribution lines with protection layers and method forming same
Publication Date: 2025.10.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12438048B2 patent drawing
  • US12438048B2 patent drawing
  • US12438048B2 patent drawing

AI summary

A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.