Redistribution Package Layout for Shorter IPD Signal Routing
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Solution Overview
Problem
The semiconductor industry faces challenges in integrating high-functional electronic components into small packages while maintaining high performance and low cost, particularly due to the need for reduced routing distances and minimized inductance and resistance between integrated devices and semiconductor devices.
Innovation Solution
A device package structure is formed with a redistribution structure over a carrier substrate, an integrated passive device attached between the redistribution structure and an interconnect structure, and a semiconductor device attached to the redistribution structure, reducing the distance between the integrated passive device and the semiconductor device, thereby improving electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If integrated circuits are packaged with traditional wiring methods, then package area can be kept small, but routing distance and inductance between contact pads and external contacts become excessive
Solution Approach 1:
The patent implements fan-out wiring that extends connections in multiple dimensions beyond the traditional planar layout. The redistribution layer creates three-dimensional routing paths that fan out from contact pads to external contacts, reducing routing distance by utilizing vertical and lateral dimensions simultaneously rather than being constrained to a two-dimensional surface.
Solution Approach 2:
The patent introduces a redistribution layer as an intermediary structure between the contact pads and external contacts. This redistribution layer acts as a mediator that repositions and reroutes electrical connections, allowing signals to travel through optimized paths that reduce inductance and resistance while maintaining compact packaging.
2Adaptability or versatility
If more input/output pads are added to achieve high functionality, then device functionality increases, but package area and complexity increase
Solution Approach 1:
The redistribution layer serves multiple functions simultaneously: it redistributes electrical signals, provides mechanical support, enables fan-out wiring for compact packaging, and facilitates connections between multiple input/output pads and external contacts. This multi-functionality allows high-density integration without proportionally increasing package area.
Solution Approach 2:
The fan-out wiring structure utilizes three-dimensional space to route signals from densely packed contact pads to external contacts, allowing multiple I/O pads to be integrated in a compact area by extending connections in multiple dimensions rather than requiring proportional increases in package footprint.
3Reliability
If traditional packaging methods are used, then manufacturing processes remain simple, but inductance and resistance between integrated devices and semiconductor devices increase
Solution Approach 1:
The redistribution layer acts as an intermediary that optimizes electrical connections between integrated devices and semiconductor devices. By introducing this intermediate structure with controlled geometry and material properties, the patent reduces inductance and resistance while maintaining manufacturing feasibility through established semiconductor fabrication processes.
Data Source
AI summary
A method includes forming a redistribution structure on a carrier, attaching an integrated passive device on a first side of the redistribution structure, attaching an interconnect structure to the first side of the redistribution structure, the integrated passive device interposed between the redistribution structure and the interconnect structure, depositing an underfill material between the interconnect structure and the redistribution structure, and attaching a semiconductor device on a second side of the redistribution structure that is opposite the first side of the redistribution structure.