Redistribution Pad Structure to Prevent Dimpling in Chip Packages
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving improved electrical and mechanical performance due to constraints in geometry and reliability as the physical size decreases, particularly in the design of pad vias and insulating patterns which can lead to dimpled structures and reduced design freedom.
Innovation Solution
The semiconductor package incorporates a redistribution substrate with a shaped insulating pattern on the pad structure, which prevents the formation of dimpled structures and maintains high design freedom for the pad via, enhancing electrical and mechanical performance by increasing the contact area between the pad and seed patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional pad structures are used in semiconductor packages, then manufacturing is simpler, but electrical and mechanical performance deteriorates due to dimpled structures and limited design freedom
Solution Approach 1:
The pad structure is segmented into multiple functional layers: pad via, pad interconnection, shaped insulating pattern, and pad seed pattern. This segmentation allows each component to be optimized independently, preventing dimpled structures while maintaining manufacturing feasibility and improving electrical/mechanical performance.
Solution Approach 2:
The shaped insulating pattern is strategically positioned only where needed to prevent dimpled structures, rather than uniformly across the entire pad area. This localized approach maintains design freedom and simplifies manufacturing while improving reliability at critical locations.
2Area of moving object
If the physical size of semiconductor packages is decreased, then integration density improves, but reliability deteriorates due to constraints in geometry and pad design
Solution Approach 1:
The invention transitions from a two-dimensional pad design to a three-dimensional structured pad with multiple layers (pad via, interconnection, insulating pattern, seed pattern). This vertical dimensionality allows improved reliability without increasing the horizontal footprint, enabling smaller package sizes while maintaining geometric integrity.
Solution Approach 2:
The pad structure uses composite construction with different materials for each layer (conductive materials for pad via and interconnection, insulating material for the shaped insulating pattern, and seed material for the pad seed pattern). This composite approach allows each material to be optimized for its specific function, improving overall reliability in compact packages.
Data Source
AI summary
A semiconductor package includes; a redistribution substrate including a redistribution pattern, a semiconductor chip mounted on a top surface of the redistribution substrate, and a connection terminal between the semiconductor chip and the redistribution substrate. The redistribution substrate further includes; a pad structure including a pad interconnection and a pad via, disposed between the redistribution pattern and the connection terminal, wherein the pad structure is electrically connected to the redistribution pattern and a top surface of the pad structure contacts the connection terminal, a shaped insulating pattern disposed on a top surface of the redistribution pattern, and a pad seed pattern disposed on the redistribution pattern and covering the shaped insulating pattern.