Redistribution Layer Pad Layout for Flexible Wafer-Level Packaging
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Solution Overview
Problem
Current semiconductor packaging methods face challenges in efficiently routing and interconnecting dies and semiconductor devices at the wafer level, particularly in achieving reliable and flexible layouts for redistribution layers that enhance yield and reduce costs.
Innovation Solution
The method involves forming a redistribution layer with alternating dielectric and metallization layers, including specific pad configurations such as round and elliptical pads, and under-ball metallurgy patterns to facilitate electrical connections and routing, which allows for efficient packaging and testing of 3D IC devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional semiconductor packaging methods are used, then manufacturing process is simple, but routing and interconnecting efficiency is poor
Solution Approach 1:
The patent transitions from traditional planar packaging to three-dimensional stacked packaging with multiple redistribution layers at different heights. Dies are vertically stacked and interconnected through TSVs (through-silicon vias) and redistribution layers, enabling efficient routing in the vertical dimension while maintaining compact footprint.
Solution Approach 2:
The packaging structure is divided into multiple functional layers including first redistribution layer, second redistribution layer, TSVs, and intermediate structures. Each layer performs specific routing functions, allowing complex interconnections to be broken down into manageable segments that can be manufactured and tested independently.
2Adaptability or versatility
If complex redistribution layers are implemented, then routing flexibility is improved, but manufacturing difficulty increases
Solution Approach 1:
Redistribution layers and TSVs are formed and tested before final die stacking. The first redistribution layer is created on the first die, tested for functionality, and then the second die is stacked and connected. This preliminary formation and testing approach allows routing flexibility to be achieved while managing manufacturing complexity through staged processes.
Solution Approach 2:
Different regions of the redistribution layers have different pad configurations (round pads, elliptical pads, under-ball metallurgy patterns) optimized for specific local routing requirements. This localized optimization provides routing flexibility where needed while maintaining simpler structures in other areas, balancing adaptability with manufacturability.
3Productivity
If wafer level packaging is used, then manufacturing efficiency is improved, but yield and cost control become challenging
Solution Approach 1:
The first redistribution layer is formed and tested on the first die while it is still at the wafer level, before final packaging completion. This intermediate testing allows yield assessment and cost control measures to be implemented early in the process, maintaining manufacturing efficiency while improving reliability through staged quality verification.
Data Source
AI summary
A semiconductor package includes a chip, a redistribution structure, and first under- ball metallurgies patterns. The chip includes conductive posts exposed at an active surface. The redistribution structure is disposed on the active surface. The redistribution structure includes a first dielectric layer, a topmost metallization layer, and a second dielectric layer. The first dielectric layer includes first openings exposing the conductive posts of the chip. The topmost metallization layer is disposed over the first dielectric layer and is electrically connected to the conductive posts. The topmost metallization layer comprises first contact pads and routing traces connected to the first contact pads. The second dielectric layer is disposed on the topmost metallization layer and includes second openings exposing the first contact pads. The first under-ball metallurgies patterns are disposed on the first contact pads, extending on and contacting sidewalls and top surfaces of the first contact pads.