Redistribution Substrate With Embedded Passive Devices for Compact Packaging
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving a reduced size while maintaining reliability and durability, particularly in the integration of semiconductor chips and passive devices like capacitors within the redistribution substrate.
Innovation Solution
The semiconductor package incorporates a redistribution substrate with a dielectric layer, conductive patterns, and seed patterns that allow for the vertical overlap of semiconductor chips with capacitors, reducing size and enhancing reliability through optimized electrical paths and structural design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If semiconductor chips and passive devices are integrated within the redistribution substrate, then device functionality is improved, but device complexity increases
Solution Approach 1:
The patent merges semiconductor chips and passive devices (capacitors, resistors) into a single redistribution substrate package. The passive devices are formed within the substrate layers, allowing multiple functional components to be combined in one integrated structure, thereby improving overall device functionality while managing complexity through systematic integration
Solution Approach 2:
The redistribution substrate serves multiple functions simultaneously: it provides mechanical support, enables electrical redistribution through conductive patterns, houses passive devices (capacitors and resistors), and facilitates bonding wire connections. This multi-functionality approach allows one component to fulfill several roles, enhancing versatility without proportionally increasing complexity
2Volume of moving object
If the semiconductor package size is reduced, then integration density is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent transitions from planar arrangement to three-dimensional vertical stacking, where passive devices are positioned at different heights within the substrate layers. This dimensional change allows compact integration without requiring proportional reduction in feature sizes, thereby achieving size reduction while managing manufacturing precision requirements
Solution Approach 2:
The passive devices are nested within the substrate structure, with capacitors and resistors formed between different conductive layers and dielectric layers. This nesting approach maximizes space utilization within the limited package volume, achieving high integration density without excessive miniaturization that would demand ultra-precise manufacturing
3Reliability
If bonding wires are used to connect semiconductor chip to printed circuit board, then electrical connection is achieved, but reliability is reduced
Solution Approach 1:
The redistribution substrate acts as an intermediary between the semiconductor chip and the printed circuit board. It provides a stable intermediate platform with embedded conductive patterns that facilitate electrical connections, replacing direct bonding wire connections with a more reliable substrate-mediated connection path that reduces stress and improves durability
4Area of stationary object
If passive devices are embedded in the redistribution substrate, then space utilization is improved, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into distinct stages: forming conductive patterns, creating dielectric layers, embedding passive devices, and establishing bonding connections. This segmentation allows each manufacturing step to be optimized independently, making the complex process of embedding passive devices more manageable and controllable
Data Source
AI summary
Disclosed is a semiconductor package including: a redistribution substrate; at least one passive device in the redistribution substrate, the passive device including a first terminal and a second terminal; and a semiconductor chip on a top surface of the redistribution substrate, the semiconductor chip vertically overlapping at least a portion of the passive device, wherein the redistribution substrate includes: a dielectric layer in contact with a first lateral surface, a second lateral surface opposite to the first lateral surface, and a bottom surface of the passive device; a lower conductive pattern on the first terminal; a lower seed pattern provided between the first terminal and the conductive pattern, and directly connected to the first terminal; a first upper conductive pattern on the second terminal and a first upper seed pattern provided between the second terminal and the first upper conductive pattern, and directly connected to the second terminal