Redistribution Substrate Layout for EMI-Resistant Signal Routing

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Solution Overview

Problem

The increasing demand for high-performance, compact semiconductor components is hindered by issues such as signal integrity degradation due to cross talk and electromagnetic interference (EMI) between semiconductor chips, leading to potential malfunctions.

Innovation Solution

A redistribution substrate with alternating layers of insulating patterns and interconnection patterns, incorporating dummy patterns to reduce parasitic capacitance and EMI, featuring dot and plate patterns to stabilize structure and improve electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If signal speed in semiconductor chip is increased, then performance is improved, but signal integrity is degraded due to cross talk

Engineering Contradiction:

Improvesignal speedVSAvoidsignal integrity

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent introduces dummy patterns as intermediary elements positioned between adjacent signal patterns. These dummy patterns act as mediators that redirect electromagnetic fields, preventing direct coupling between neighboring signal lines and thereby reducing cross-talk while maintaining high signal speed.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the harmful electromagnetic fields that cause cross-talk into beneficial redirected fields by strategically placing dummy patterns. The electromagnetic energy that would otherwise interfere with adjacent signals is redirected through the dummy patterns, transforming a harmful effect into a controlled field distribution that maintains signal integrity.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

2Adaptability or versatility

If multiple semiconductor chips are integrated in a single package, then functionality is improved, but electromagnetic interference occurs between chips

Engineering Contradiction:

Improveintegration capabilityVSAvoidelectromagnetic interference

Core Design Contradiction:

Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent employs dummy patterns as intermediary structures between adjacent signal patterns and chips. These dummy patterns serve as electromagnetic field redistributors that prevent direct interference between multiple integrated chips, enabling higher integration while maintaining electrical stability.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different dummy pattern configurations (dot patterns versus plate patterns) at different locations within the interconnection structure. This localized optimization allows specific areas to address particular EMI challenges, enabling effective multi-chip integration with tailored electromagnetic interference mitigation for each region.

Inventive Principle:

Principle #3Local quality

3Stability of the object's composition

If dot patterns and plate patterns are used in interconnection layers, then structural stability is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvestructural stabilityVSAvoidpattern complexity

Core Design Contradiction:

Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent segments the dummy patterns into two distinct types: dot patterns and plate patterns. This segmentation allows each pattern type to fulfill specific functional roles - dot patterns for general EMI reduction and plate patterns for enhanced structural support - thereby achieving structural stability through diversified, specialized elements rather than uniform complex structures.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances structural stability and electrical performance by minimizing signal interference and delamination, ensuring reliable operation of semiconductor packages.

Implementation Method 1

incorporating dummy patterns to reduce parasitic capacitance and EMI

Methodology Applied

Scientific EffectParasitic capacitance: Capacitance

Implementation Method 2

dummy patterns to reduce parasitic capacitance and EMI

Methodology Applied

Scientific EffectElectromagnetic interference: Electromagnetic Induction

Data Source

PatentUS20250336839A1Redistribution substrate and semiconductor package including the same

Publication Date: 2025.10.30 SAMSUNG ELECTRONICS CO LTD

AI summary

A redistribution substrate may include a first interconnection layer having a first insulating pattern, a first dummy pattern and a second dummy pattern, the first and second dummy patterns being in the first insulating pattern, and a second interconnection layer stacked on the first interconnection layer, the second interconnection layer having a second insulating pattern, a signal pattern and a power/ground pattern, the signal and power/ground patterns being in the second insulating pattern. The first dummy pattern may be located below the signal pattern, and the second dummy pattern may be located below the power/ground pattern. The first dummy pattern may include dot patterns, and the second dummy pattern may include a plate pattern.