Redistribution Substrate Layout for Stable Semiconductor Package Wiring
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving increased integration density and improved reliability, particularly in the design of redistribution substrates which affect the electrical connectivity and durability of semiconductor chips.
Innovation Solution
The semiconductor package incorporates a redistribution substrate with an insulating layer and redistribution patterns that include a via portion, pad portion, and line portion, where the pad portion overlaps the via portion, and the line portion extends from the pad portion, with specific geometrical features such as rounded and linear side surfaces, and a seed/barrier pattern to prevent oxidation, enhancing connectivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional redistribution substrate designs are used, then manufacturing is simpler, but integration density and reliability are insufficient
Solution Approach 1:
The redistribution pattern is divided into three distinct segments: via portion, pad portion, and line portion. Each segment serves a specific function and has optimized geometry. The via portion provides vertical electrical connection, the pad portion ensures stable bonding with semiconductor chips, and the line portion transmits electrical signals. This segmentation allows each part to be optimized independently for reliability while maintaining manufacturability.
Solution Approach 2:
Different portions of the redistribution pattern have different geometric characteristics tailored to their specific functions. The via portion has a specific width for optimal electrical connection, the pad portion has a larger area for stable bonding, and the line portion has controlled width for signal transmission. This local quality optimization enhances overall reliability without requiring complete redesign of the entire substrate.
2Reliability
If metal patterns are used without protection, then manufacturing is easier, but oxidation occurs reducing reliability
Solution Approach 1:
The redistribution pattern uses a composite structure with a metal pattern layer and a protective layer. The metal layer (e.g., copper) provides excellent electrical conductivity, while the protective layer (e.g., barrier metal or dielectric material) prevents oxidation. This composite structure maintains ease of manufacture through standard layered fabrication processes while significantly improving oxidation resistance and long-term reliability.
3Reliability
If pad portion level is higher than line portion, then bonding is easier, but electrical connection stability deteriorates
Solution Approach 1:
The design transitions from a two-dimensional planar structure to a three-dimensional stepped structure. The pad portion is positioned at a lower level than the line portion, creating a vertical dimension difference. This dimensional change allows the pad portion to have larger surface area for bonding while the line portion maintains its electrical connection function at a higher level, achieving both bonding ease and electrical stability through spatial separation.
4Area of stationary object
If integration density is increased, then package size is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The redistribution pattern employs a nested structure where the pad portion is positioned within the projection area of the via portion, and the line portion extends from the pad. This nesting allows compact arrangement of electrical connections, enabling higher integration density and smaller package footprint. The nested geometry maintains clear dimensional relationships that can be controlled within standard manufacturing tolerances, avoiding excessive precision requirements.
Data Source
AI summary
A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.