Redistribution Structure and UBM Layout for Compact Fan-Out Packaging
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Solution Overview
Problem
The challenge in integrated circuit and package design is optimizing electrical connections between components such as memory chips and logic chips to achieve a compact system structure, particularly in integrated fan-out packages.
Innovation Solution
A method involving the formation of a redistribution structure with alternately stacked dielectric and conductive layers, including a seed layer and wiring layer, and the use of an under-bump metallization layer for electrical connections, along with a de-bonding layer for substrate separation, to enhance electrical connectivity and compactness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple types of devices or components are integrated to form a compact system, then the system compactness is improved, but the electrical connection optimization becomes more complex
Solution Approach 1:
The patent employs multiple stacked conductive layers (first conductive layer, second conductive layer, third conductive layer) arranged in different vertical dimensions to establish electrical connections between components. This multi-dimensional routing approach enables optimized electrical connectivity while maintaining compact horizontal footprint, resolving the contradiction between system compactness and electrical connection complexity.
Solution Approach 2:
The electrical connection system is segmented into multiple independent conductive layers, each serving specific connection functions. The first conductive layer connects to first pads, the second conductive layer connects to second pads, and the third conductive layer connects to third pads. This segmentation allows independent optimization of each connection path, simplifying the overall electrical connection design in integrated fan-out packages.
2Adaptability or versatility
If a de-bonding layer is formed on the semiconductor substrate for substrate separation, then the substrate separation capability is improved, but the structural complexity increases
Solution Approach 1:
The de-bonding layer is extracted as a separate functional component formed on the semiconductor substrate. This dedicated layer is specifically designed to facilitate substrate separation when needed, while not interfering with the normal operation of the integrated fan-out package. The separation capability is thus added without permanently increasing the operational structural complexity.
3Reliability
If alternately stacked dielectric and conductive layers are formed to enhance electrical connectivity, then the electrical connectivity is improved, but the manufacturing complexity increases
Solution Approach 1:
The conductive layers and dielectric layers are formed in a predetermined stacked sequence during the manufacturing process. The first conductive layer is formed first, followed by the dielectric layer, then the second conductive layer, and finally the third conductive layer. This preliminary arrangement of conductive paths before component integration simplifies subsequent assembly steps and reduces manufacturing complexity while ensuring reliable electrical connectivity.
Data Source
AI summary
A structure including a redistribution structure comprising dielectric layers and conductive layers alternately stacked is provided, wherein a dielectric layer among the dielectric layers of the redistribution structure comprises a first surface, a conductive layer among the conductive layers of the redistribution structure comprising a second surface, and the conductive layer comprises a wiring layer and a seed layer; and an under-bump metallization (UBM) layer comprises a third surface, a fourth surface opposite to the third surface, and a sidewall surface extending from the third surface to the fourth surface, wherein a portion of the seed layer is between the wiring layer and the UBM layer, and the UBM is in contact with the dielectric layer.