Reduced Angle Phase Comparator for Jitter Tolerant Clock Data Recovery
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Solution Overview
Problem
Determining data edge-free locations in communication channels is challenging due to jitter introduced by various components and environmental factors, which can be comparable to data bit length, affecting clock and data recovery.
Innovation Solution
A method and apparatus that increase jitter tolerance by detecting the phase of data transitions within a full unit interval with defined active and inactive zones based on jitter characteristics, generating phase directives to adjust sampling clock phases, and sampling data at edge-free locations, using a clock data recovery (CDR) device with a reduced angle phase comparator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional clock and data recovery methods are used to determine data edge free location, then the system can recover data, but jitter comparable to data bit length makes it challenging to accurately determine the data edge free location
Solution Approach 1:
The unit interval is segmented into multiple zones (first zone, second zone, third zone, fourth zone) based on phase detector output ranges. Each zone corresponds to specific sampling phase adjustments, allowing the system to handle different jitter conditions in different regions of the phase space, thereby improving both measurement precision and reliability
Solution Approach 2:
The sampling phase is dynamically adjusted based on the detected data transition phase. The system continuously monitors the phase detector output and modifies the sampling clock phase in real-time according to the identified zone, enabling adaptive compensation for jitter variations and improving reliability under varying channel conditions
2Measurement precision
If the sampling phase is continuously adjusted to track data transitions, then data recovery accuracy improves, but the system becomes more sensitive to jitter variations
Solution Approach 1:
Different zones within the phase detector output range are assigned different sampling phase adjustment strategies. The first and third zones correspond to one sampling phase, while the second and fourth zones correspond to another sampling phase. This local differentiation allows the system to optimize for specific jitter conditions in different regions, improving data sampling accuracy while reducing overall jitter sensitivity
Solution Approach 2:
The system uses discrete phase adjustments rather than continuous tracking. By limiting the phase adjustments to specific predetermined values corresponding to different zones, the system achieves sufficient sampling accuracy without fully tracking every jitter variation, thereby reducing sensitivity to high-frequency jitter components
Data Source
AI summary
Aspects of the disclosure provide a method and an apparatus for clock and data recovery. The method and apparatus can increase jitter tolerance, and can provide recovered data with reduced jitter amplitude. The method for recovering data transmitted over a channel can include detecting a phase of a data transition within a full unit interval that includes an active zone and an inactive zone that are set based on a jitter characteristic for the channel, generating a phase directive when the phase of the data transition is located within the active zone, and adjusting a data sampling phase based on the phase directive, so that the data transmitted over the channel is sampled at a data transition edge free location.