Reduced-Length Bond Pads for Broadband Doherty Amplifiers
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Solution Overview
Problem
Conventional bond pads in Doherty amplifiers contribute significant parasitic capacitance, limiting the broadband performance of the amplifier due to their large area, which affects the efficiency and bandwidth, especially at high frequencies.
Innovation Solution
The bond pads connecting the drain finger manifold of a transistor are designed to extend less than the full length of the manifold, allowing controlled parasitic capacitance, thereby optimizing the performance of the impedance inverter and improving the amplifier's bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bond pads are made large to ensure reliable electrical connection and current handling, then connection reliability is improved, but parasitic capacitance increases which limits bandwidth
Solution Approach 1:
The patent changes the geometric parameters of the bond pad, specifically reducing its length along the manifold while maintaining adequate width and area for reliable electrical connection. This parameter optimization reduces the parasitic capacitance formed between the bond pad and substrate, thereby extending the amplifier's bandwidth without compromising connection reliability
Solution Approach 2:
The patent applies different bond pad length configurations to different regions of the manifold. By making the bond pad length less than the full manifold length, it creates an optimized local geometry that reduces parasitic capacitance in critical high-frequency paths while maintaining adequate connection area where needed
2Stability of the object's composition
If bond pads extend the full length of the manifold, then current distribution is improved, but parasitic capacitance increases reducing efficiency
Solution Approach 1:
The patent optimizes the bond pad length parameter to be less than the full manifold length, striking a balance between maintaining adequate current distribution across the transistor drain fingers and minimizing parasitic capacitance. This reduced length decreases the capacitive loading that would otherwise cause power loss and reduce amplifier efficiency, particularly in compression-mode operation
3Power
If bond pad area is increased to handle higher current, then current handling capability is improved, but parasitic capacitance increases limiting broadband performance
Solution Approach 1:
The patent carefully balances the bond pad dimensions by reducing length while maintaining adequate width and overall area. This optimized geometry provides sufficient current handling capability for high-power amplifier operation while minimizing the parasitic capacitance that would otherwise limit broadband performance and frequency response
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the bandwidth of Doherty amplifiers by reducing parasitic capacitance, resulting in improved efficiency and performance across a broader frequency range, as demonstrated by simulated frequency responses showing a significant increase in 3 dB bandwidth.
Implementation Method 1
the length of the bond pad selected to control a parasitic capacitance
Data Source
AI summary
In a transistor formed on a semiconductor die mounted on a substrate, where the transistor output is connected to a circuit on the substrate, a bond pad electrically connected to a transistor drain finger manifold extends less than the full length of the manifold. By controlling the length of the bond pad, the parasitic capacitance it contributes may be controlled. In applications such as a Doherty amplifier, this parasitic capacitance forms part of the quarter-wave transmission line of an impedance inverter, and hence directly impacts amplifier performance. In particular, by reducing the parasitic capacitance contribution from transistor output bond pads, the bandwidth of a Doherty amplifier circuit may be improved. At GHz frequencies and with state of the art transistor device feature sizes, concerns about phase mismatch between drain finger outputs are largely moot.