Reduced-Dimension Via-Land Structure for High-Density Interconnects
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Solution Overview
Problem
Existing package substrates face challenges in accommodating both high and low density interconnect pitches, with via lands occupying space that could be used for trace routing, and requiring protection during manufacturing to prevent damage from laser ablation and chemical penetration.
Innovation Solution
The implementation of reduced-dimension via-land structures, where the via land is embedded in a recess of the conductive via, allowing for increased trace density and protection of metal layers during manufacturing by acting as a stop marker for laser penetration and preventing chemical damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via lands are made larger to ensure stable electrical connections, then connection reliability is improved, but trace routing space is reduced
Solution Approach 1:
The via land extends vertically into the conductive via, utilizing the depth dimension rather than only horizontal area. This allows the via land to maintain adequate surface area for electrical connection while reducing its footprint on the surface plane, thereby preserving trace routing space.
Solution Approach 2:
The via land is nested within the conductive via structure, with the via land positioned inside and extending into the via. This nesting arrangement allows the via land to be encompassed by the conductive via, achieving space-efficient design that maintains connection reliability without occupying excessive surface area.
2Productivity
If via lands are reduced in dimension to increase trace density, then space utilization is improved, but manufacturing protection is reduced
Solution Approach 1:
The via land extends vertically into the conductive via, compensating for reduced horizontal dimensions. This vertical extension maintains adequate material volume for manufacturing protection while reducing surface footprint to increase trace density.
Solution Approach 2:
The via land is nested within the conductive via, allowing it to be protected by the via structure during manufacturing processes such as laser ablation. The via land's position inside the via provides inherent protection while occupying minimal surface space.
3Productivity
If via lands are embedded in recesses to increase circuit density, then space efficiency is improved, but manufacturing complexity is increased
Solution Approach 1:
The via land and conductive via are merged into an integrated structure, where the via land extends into the via and is encompassed by it. This merging eliminates the need for separate via land features and simplifies the manufacturing process while achieving reduced-dimension design.
Solution Approach 2:
The via land is nested within the conductive via recess, creating a compact integrated structure. This nesting approach achieves space-efficient design without requiring complex external features, as the via structure itself provides the recess that houses the via land.
Data Source
AI summary
A package substrate includes a dielectric layer, a conductive via disposed in the dielectric layer, and a conductive pattern layer exposed from a first surface of the dielectric layer. The conductive pattern layer includes traces and a via land, the via land extends into the conductive via, and a circumferential portion of the via land is encompassed by the conductive via. A method of making a package substrate includes forming a conductive pattern layer including traces and a via land, providing a dielectric layer to cover the conductive pattern layer, and forming a via hole. Forming the via hole is performed by removing a portion of the dielectric layer and exposing a bottom surface of the via land and at least a portion of a side surface of the via land. A conductive material is applied into the via hole to form a conductive via covering the via land.