Reduced FPL Device Stacking for Compact IC Assembly
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Solution Overview
Problem
The challenge in integrated circuit packaging is to reduce the footprint of devices while maintaining mechanical strength and reliability, especially in compact systems like handheld devices and smart cards, where stacking integrated circuits at the die level requires expensive equipment and extensive testing.
Innovation Solution
A method and apparatus that involves reducing the size of a finished package level device with a grounded tested die to nearly its original size, attaching it to a substrate using solder balls, and stacking multiple devices to form a compact assembly with high mechanical strength and reliability, utilizing standard surface mount reflow processes and encapsulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If integrated circuits are stacked at the die level to reduce footprint, then the device footprint is reduced, but expensive equipment and extensive die testing steps are required
Solution Approach 1:
Instead of stacking dice at the die level (conventional approach), the patent inverts the approach by stacking finished packaged devices. This reversal eliminates the need for expensive die-level equipment and extensive die testing, as standard packaged devices with built-in protection are used instead.
Solution Approach 2:
The patent uses standard finished packaged devices that are mass-produced with built-in protective structures. These off-the-shelf packaged devices replace the need for expensive specialized die-level equipment and extensive testing procedures, making the stacking process more economical.
2Area of moving object
If devices are stacked to reduce footprint, then compact form factor is achieved, but mechanical strength and reliability may be compromised
Solution Approach 1:
The patent utilizes the built-in protective structures (such as molded encapsulation and substrate support) that already exist in standard finished packaged devices. These pre-existing protective features serve as cushioning that maintains mechanical strength and reliability in the stacked configuration without requiring additional reinforcement.
Solution Approach 2:
The stacked device assembly combines multiple packaged devices with substrates and interconnect structures to form a composite assembly. This composite structure distributes mechanical loads and maintains overall strength while achieving compact footprint through vertical stacking.
3Ease of manufacture
If finished package level devices are used instead of dice, then equipment expenses and testing requirements are reduced, but device size is larger
Solution Approach 1:
The patent transitions from horizontal placement of dice to vertical stacking of finished packaged devices. This dimensional change allows the use of larger finished packages while achieving compact overall footprint through the third dimension (height), thereby reducing manufacturing complexity while maintaining space efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a compact package with high mechanical strength, reduced manufacturing costs, and improved reliability by enabling efficient stacking of devices while minimizing equipment expenses and testing requirements.
Implementation Method 1
A solder paste is applied to the first substrate and the solder paste is reflowed. The reduced first FPL device is attached to the first substrate
Data Source
AI summary
An embodiment is a method and apparatus to stack devices. A first finished package level (FPL) device having a first grounded tested die (GTD) is reduced to nearly size of the first GTD. The first FPL has a first plurality of solder balls. The reduced first FPL device is attached to a first substrate to form a first device assembly.