Reduced Netlist ESD Simulation for IC Reliability
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Solution Overview
Problem
Integrated circuits face reliability issues due to electrostatic discharges (ESD) that can damage thin oxides and metal interconnects, exacerbated by process scaling, which existing ESD protection circuits often fail to adequately address.
Innovation Solution
A method and system for modeling ESD events by obtaining a reduced netlist from an integrated circuit's circuit netlist, focusing on ESD protection devices, and simulating discharge paths using diode and resistor networks to determine circuit parameters and potential damage paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a full circuit netlist is used for ESD simulation, then simulation accuracy is improved, but computational complexity and time increase significantly
Solution Approach 1:
The circuit netlist is segmented into two parts: a reduced netlist containing only ESD-relevant components (ESD protection devices, interconnects, and entry/exit nodes) and a removed portion containing inactive or non-ESD-critical circuits. This segmentation allows simulation to focus only on the critical path while maintaining accuracy for ESD analysis.
Solution Approach 2:
Inactive circuits and non-ESD-critical components are extracted and removed from the netlist before simulation. The patent identifies and removes portions of the circuit that do not contribute to ESD discharge paths, thereby reducing computational complexity while preserving simulation accuracy for ESD-relevant paths.
2Quantity of substance
If process scaling continues to reduce oxide thickness and interconnect size, then integration density is improved, but ESD damage risk increases
Solution Approach 1:
The patent performs preliminary identification of ESD discharge paths and critical components before actual ESD events occur. By pre-characterizing the reduced netlist and identifying vulnerable interconnects and transistors, the system can prioritize protection efforts and simulate worst-case scenarios in advance.
Solution Approach 2:
A simplified copy of the circuit (reduced netlist) is created that replicates only the essential ESD discharge paths and critical components. This copy maintains the electrical characteristics necessary for accurate ESD simulation while being computationally manageable, allowing repeated simulations for design optimization.
Data Source
AI summary
A method for modeling electrostatic discharges. The method may include obtaining a circuit netlist for an integrated circuit. The circuit netlist may describe connection information for various electronic components within the integrated circuit. The method may further include obtaining, by removing a portion of the electronic components from the circuit netlist, a reduced netlist. The method may further include determining, using the reduced netlist, various circuit parameters regarding an electrostatic discharge event for the integrated circuit. The method may further include simulating, using the circuit parameters, a discharge path within the integrated circuit for the electrostatic discharge event.