Reduction Operation Configuration for Adaptive CGRA Parallelism
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing coarse-grained reconfigurable architectures (CGRA) face challenges in optimizing the utilization efficiency of processing elements (PEs) due to variable loop counts in reduction operations, leading to underutilization or overallocation of PEs, which hinders efficient data processing and power consumption.
Innovation Solution
An information processing apparatus and method that generates an operation configuration for reduction operations by using a loop unrolling factor to determine the number of functional units and connection paths, allowing for dynamic adjustment of parallelism based on input data, thereby optimizing PE utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the loop count is made as large as possible within a range allowed by the resource of the CGRA, then the effect of the DFG optimization can be further improved, but there may be many PEs that are not used
Solution Approach 1:
The patent applies dynamics by making the DFG generation adaptive to the actual loop count. Instead of generating a fixed DFG with maximum loop unrolling, the system dynamically adjusts the DFG structure based on the runtime loop count value. This allows the system to optimize for the actual execution needs rather than the worst-case scenario, improving both productivity and resource utilization efficiency.
Solution Approach 2:
The patent changes the parameter of loop unrolling factor from a fixed compile-time value to a dynamic value determined at runtime based on the actual loop count. This parameter change enables the system to adjust the degree of parallelism and PE allocation according to the actual computation requirements, resolving the contradiction between optimization effect and resource efficiency.
2Productivity
If too many PEs are reserved for allocating the DFG, then the DFG optimization effect can be improved, but it is difficult to improve the utilization efficiency of the PEs
Solution Approach 1:
The patent applies preliminary action by pre-defining multiple DFG templates with different loop unrolling factors during compilation. At runtime, the system selects and activates only the template that matches the actual loop count, avoiding the need to allocate and manage all possible PEs simultaneously. This reduces device complexity while maintaining the ability to achieve optimal operation speed when needed.
3Speed
If loop unrolling is performed to increase parallelism, then the speed of calculation is increased, but the number of PEs required increases
Solution Approach 1:
The patent dynamically changes the loop unrolling factor parameter based on the actual loop count at runtime. When the loop count is small, a smaller unrolling factor is used, requiring fewer PEs. When the loop count is large, a larger unrolling factor is applied to maximize calculation speed. This parameter adaptation resolves the contradiction between speed and PE quantity by matching resource allocation to actual computational needs.
Data Source
AI summary
An information processing apparatus that generates an operation configuration including functional units to be used, a connection path between the functional units, and an output path of an operation result, for a reduction operation, based on a plurality of pieces of operation input data including sets of two pieces of data, the information processing apparatus comprising, a memory, and a processor coupled to the memory and configured to, generate an initial operation configuration based on a loop unrolling factor that is a number of the functional units that perform the predetermined operation with the operation input data as a direct input, and generate a first operation configuration by adding an output path of an operation result for a different degree of parallelism in a case where the predetermined operation is repeated with a predetermined degree of parallelism to the generated initial operation configuration.