Reduction Operation Device Type Mismatch Detection

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Solution Overview

Problem

In parallel processing systems, non-correspondence between operation types and data types across nodes can lead to incomplete processing or error calculations, making it difficult to debug and requiring lengthy communication to establish synchronization.

Innovation Solution

A reduction operation device that receives synchronization signals and data, compares operation types and data types after synchronization, and transmits non-correspondence signals to prevent errors, allowing the execution of operations only when types match, thereby preventing hang-ups and error calculations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If software is used to execute reduction operation on CPU, then flexibility and ease of programming are improved, but processing time increases and non-correspondence detection becomes complex

Engineering Contradiction:
Improveease of programmingVSAvoidprocessing time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent replaces software-based reduction operation execution with a dedicated hardware reduction operation device. This hardware device includes synchronization units that automatically detect non-correspondence between operation types and data types across nodes, eliminating the need for software-based detection and significantly reducing processing time while maintaining ease of use through automatic handling of type correspondence.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If communication of operation type and data type is added to detect non-correspondence, then reliability is improved, but processing time increases

Engineering Contradiction:
Improvedetection accuracyVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the communication of operation type and data type with the existing reduction operation data transmission. The synchronization unit incorporates type information directly into the data packets being exchanged between nodes, so that type correspondence detection occurs as part of the normal data communication process rather than as a separate additional communication step, thereby maintaining reliability without significant time penalty.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The synchronization unit performs preliminary comparison of operation types and data types before executing the reduction operation. By checking type correspondence in advance and transmitting non-correspondence signals immediately when mismatches are detected, the system prevents errors before they can cause hanging or incorrect calculations, improving reliability without requiring extensive communication during execution.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If independent reduction operation device is provided to each node, then processing speed is improved, but device complexity increases

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The reduction operation device is designed as a universal module that can be independently provided to each node while performing multiple functions: executing reduction operations, synchronizing data between nodes, detecting non-correspondence of operation types and data types, and transmitting results. This multi-functional design improves processing speed through parallel execution across nodes while managing complexity by consolidating multiple functions into a single standardized device structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9619300B2Reduction operation device, a processor, and a computer system
Publication Date: 2017.04.11 FUJITSU LTD
  • US9619300B2 patent drawing
  • US9619300B2 patent drawing
  • US9619300B2 patent drawing

AI summary

A reduction operation device detects a non-correspondence of an operation type or a data type in a reduction arithmetic operation of a parallel processing. The reduction operation device is inputted a plurality of the synchronization signals and data, sets each transmission destinations of the plurality of inputted synchronization signals and the plurality of data corresponding to a next stage of a reduction operation and executes the reduction operation. The synchronization unit in the reduction operation device detects the non-correspondence between the operation type or the data type included in an instruction of the reduction operation after the synchronization is established and controls the arithmetic operation of the arithmetic unit.